A 2.4 GHz CMOS Power Amplifier Using Asymmetric MOSFETs
| dc.citation.epage | 492 | en_US |
| dc.citation.spage | 490 | en_US |
| dc.contributor.author | Liu, Szu-Ling | en_US |
| dc.contributor.author | Huang, Yu-Chien | en_US |
| dc.contributor.author | Chen, Ying-Jen | en_US |
| dc.contributor.author | Chang, Tsu | en_US |
| dc.contributor.author | Chin, Albert | en_US |
| dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
| dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
| dc.date.accessioned | 2014-12-08T15:30:46Z | |
| dc.date.available | 2014-12-08T15:30:46Z | |
| dc.date.issued | 2012 | en_US |
| dc.description.abstract | In this paper, a two-stage 2.4 GHz power amplifier (PA) using the high-breakdown-voltage asymmetric NMOSFETs was implemented in a 0.18-mu m CMOS technology. In this process, the conventional NMOSFETs have a drain-to-source breakdown voltage (BVdss) about 3.5V, therefore restricting the available output power in PA designs. However, by using the special asymmetric NMOSFETs in the proposed PA, the circuit can safely operate at a supply voltage from 1.8 to 2.75V. Under a 2.75V operation, good power performances include a power gain of 20.4 dB, an output 1-dB compression point (P-out,P-1dB) of 21.5dBm and a power-added-efficiency (PAE) of 29.6%. | en_US |
| dc.identifier.isbn | 978-1-4577-1330-9 | en_US |
| dc.identifier.journal | 2012 ASIA-PACIFIC MICROWAVE CONFERENCE (APMC 2012) | en_US |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/21992 | |
| dc.identifier.wosnumber | WOS:000319213700163 | |
| dc.language.iso | en_US | en_US |
| dc.subject | power amplifier | en_US |
| dc.subject | breakdown voltage | en_US |
| dc.subject | PAE | en_US |
| dc.title | A 2.4 GHz CMOS Power Amplifier Using Asymmetric MOSFETs | en_US |
| dc.type | Proceedings Paper | en_US |
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