X86超純量處理器之預測性記憶體存取單元設計
| dc.contributor.author | 單智君 | en_US |
| dc.contributor.author | JEAN JYH-JIUNSHANN | en_US |
| dc.contributor.department | 國立交通大學資訊工程學系 | zh_TW |
| dc.date.accessioned | 2014-12-13T10:36:25Z | |
| dc.date.available | 2014-12-13T10:36:25Z | |
| dc.date.issued | 2000 | en_US |
| dc.description.sponsorship | 行政院國家科學委員會 | zh_TW |
| dc.identifier.govdoc | NSC89-2213-E009-205 | zh_TW |
| dc.identifier.uri | https://www.grb.gov.tw/search/planDetail?id=577589&docId=108140 | en_US |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/93927 | |
| dc.language.iso | zh_TW | en_US |
| dc.title | X86超純量處理器之預測性記憶體存取單元設計 | zh_TW |
| dc.title | Design of a Speculative Memory Access Unit for X86 Superscalar Processors | en_US |
| dc.type | Plan | en_US |