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Impacts of a buffer layer and hydrogen-annealed wafers on the performance of strained-channel nMOSFETs with SiN-capping layer

dc.citation.epage1524en_US
dc.citation.issue10en_US
dc.citation.spage1518en_US
dc.citation.volume52en_US
dc.contributor.authorTsai, Tzu-Ien_US
dc.contributor.authorLin, Horng-Chihen_US
dc.contributor.authorLee, Yao-Jenen_US
dc.contributor.authorChen, King-Shengen_US
dc.contributor.authorWang, Jeffen_US
dc.contributor.authorHsueh, Fu-Kuoen_US
dc.contributor.authorChao, Tien-Shengen_US
dc.contributor.authorHuang, Tiao-Yuanen_US
dc.contributor.department電子物理學系zh_TW
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electrophysicsen_US
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.date.accessioned2014-12-08T15:42:29Z
dc.date.available2014-12-08T15:42:29Z
dc.date.issued2008-10-01en_US
dc.description.abstractIn this study, the effects of Si3N4 layer capping and TEOS buffer layer inserted prior to the Si3N4 deposition on the NMOS device characteristics as well as correlated hot-electron degradations were investigated. The devices were built on two kinds of the substrates, namely, Cz and hydrogen-annealed (Hi) wafers. More importantly, we found that hydrogen species is the primary culprit for aggravated reliabilities in strained devices. By exerting the accelerated stress test, we could study the hot-electron degradation thoroughly in terms of threshold voltage shift (Delta V-TH), transconductance degradation (Delta Gm) and so on. The TEOS buffer layer could effectively block the diffusion of hydrogen species from the Si3N4 capping layer into the channel and the Si/SiO2 interface during the Si3N4 deposition as well as subsequent thermal cycles. (C) 2008 Elsevier Ltd. All rights reserved.en_US
dc.identifier.doi10.1016/j.sse.2008.06.007en_US
dc.identifier.issn0038-1101en_US
dc.identifier.journalSOLID-STATE ELECTRONICSen_US
dc.identifier.urihttp://dx.doi.org/10.1016/j.sse.2008.06.007en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/28854
dc.identifier.wosnumberWOS:000260755900009
dc.language.isoen_USen_US
dc.subjectStrained-Sien_US
dc.subjectCESLen_US
dc.subjectSi3N4 cappingen_US
dc.subjectHydrogen-annealed waferen_US
dc.titleImpacts of a buffer layer and hydrogen-annealed wafers on the performance of strained-channel nMOSFETs with SiN-capping layeren_US
dc.typeArticle; Proceedings Paperen_US

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