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Leveraging Data Lifetime for Energy-Aware Last Level Non-Volatile SRAM Caches using Redundant Store Elimination

dc.citation.woscount0en_US
dc.contributor.authorTsai, Hsiang-Jenen_US
dc.contributor.authorChen, Chien-Chihen_US
dc.contributor.authorYang, Keng-Haoen_US
dc.contributor.authorYang, Ting-Chinen_US
dc.contributor.authorHuang, Li-Yueen_US
dc.contributor.authorChung, Ching-Haoen_US
dc.contributor.authorChang, Meng-Fanen_US
dc.contributor.authorChen, Tien-Fuen_US
dc.contributor.department資訊工程學系zh_TW
dc.contributor.departmentDepartment of Computer Scienceen_US
dc.date.accessioned2015-07-21T11:21:54Z
dc.date.available2015-07-21T11:21:54Z
dc.date.issued2014-01-01en_US
dc.description.abstractNVM has commonly been used to address increasingly large last-level caches (LLCs) requirements by reducing leakage. However, frequent data-writing operations result in increased energy consumption. In this context, a promising memory technology, Non-volatile SRAM (nvSRAM), enables normal and standby operation modes which can be used to store various types of data. However, nvSRAM suffers from high dynamic energy usage due to frequent switching between operation modes. In this paper, we propose a redundant store elimination (RSE) scheme which, on average, discards 94% of needless bit-write operations. Moreover, we present a retention-aware cache management policy to reduce data updates of cache blocks, based on the correlation between data lifetime and cache types. Experimental results demonstrate that our proposal can improve energy consumption of SRAM-based and RRAM-based LLCs by 57% and 31%, respectively.en_US
dc.identifier.doi10.1145/2593069.2593153en_US
dc.identifier.isbn978-1-4503-2730-5en_US
dc.identifier.issn0738-100Xen_US
dc.identifier.journal2014 51ST ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC)en_US
dc.identifier.urihttp://dx.doi.org/10.1145/2593069.2593153en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/124921
dc.identifier.wosnumberWOS:000346506400037en_US
dc.language.isoen_USen_US
dc.subjectNon-volatile SRAMen_US
dc.subjectRedundant store eliminationen_US
dc.subjectEnergy reductionen_US
dc.subjectOn-chip cache architectureen_US
dc.subjectMemory structureen_US
dc.subjectNon-volatile memoryen_US
dc.subjectMulti-coreen_US
dc.titleLeveraging Data Lifetime for Energy-Aware Last Level Non-Volatile SRAM Caches using Redundant Store Eliminationen_US
dc.typeProceedings Paperen_US

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