A 24 GHz Low-power and High-gain Low-noise Amplifier Using 0.18 mu m CMOS Technology for FMCW Radar Applications

dc.citation.epage	896	en_US
dc.citation.spage	892	en_US
dc.contributor.author	Lin, Chun-Yi	en_US
dc.contributor.author	Lin, Ming-Wei	en_US
dc.contributor.author	Liang, Ching-Piao	en_US
dc.contributor.author	Chung, Shyh-Jong	en_US
dc.contributor.department	傳播研究所	zh_TW
dc.contributor.department	Institute of Communication Studies	en_US
dc.date.accessioned	2014-12-08T15:33:15Z
dc.date.available	2014-12-08T15:33:15Z
dc.date.issued	2012	en_US
dc.description.abstract	In this paper, a low power and high gain low-noise amplifier (LNA) is presented for 24 GHz FMCW radar applications fabricated in a 0.18 mu m RF CMOS process. The proposed LNA is with the characteristics of the source inductive degeneration type, the current reuse technique, and the invariance of current density in CMOS process. The proposed LNA with a compact size has a gain of 18.95 dB and a noise figure of 5.8 dB, while consuming 11.3 mW. The measured input 1-dB compression point (IP1 dB) and an input third-order intercept point (IIP3) are -26 dBm and -16.5 dBm, respectively.	en_US
dc.identifier.isbn	978-1-934142-20-2	en_US
dc.identifier.issn	1559-9450	en_US
dc.identifier.journal	PROCEEDINGS OF PROGRESS IN ELECTROMAGNETICS RESEARCH SYMPOSIUM (PIERS 2012)	en_US
dc.identifier.uri	https://ir.lib.nycu.edu.tw/handle/11536/23141
dc.identifier.wosnumber	WOS:000327380000188
dc.language.iso	en_US	en_US
dc.title	A 24 GHz Low-power and High-gain Low-noise Amplifier Using 0.18 mu m CMOS Technology for FMCW Radar Applications	en_US
dc.type	Proceedings Paper	en_US

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