Active ESD Protection for Input Transistors in a 40-nm CMOS Process

Abstract

This work presents a novel design for input ESD protection. By replacing the protection resistor with an active switch that isolates the input transistors from the pad under ESD stress, the ESD robustness can be greatly improved. The proposed designs were designed and verified in a 40-nm CMOS process using only thin oxide devices, which can successfully pass the typical industry ESD-protection specifications of 2-kV HBM and 200-V MM ESD tests.