Architecture and operations of the VLSI array processors for implementing a receding horizon controller
| dc.citation.epage | 794 | en_US |
| dc.citation.spage | 789 | en_US |
| dc.contributor.author | Lin, SY | en_US |
| dc.contributor.department | 電控工程研究所 | zh_TW |
| dc.contributor.department | Institute of Electrical and Control Engineering | en_US |
| dc.date.accessioned | 2014-12-08T15:27:43Z | |
| dc.date.available | 2014-12-08T15:27:43Z | |
| dc.date.issued | 1995 | en_US |
| dc.identifier.isbn | 0-08-042371-X | en_US |
| dc.identifier.journal | NONLINEAR CONTROL SYSTEMS DESIGN 1995, VOLS 1 AND 2 | en_US |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/19973 | |
| dc.identifier.wosnumber | WOS:A1995BF64Y00130 | |
| dc.language.iso | en_US | en_US |
| dc.subject | nonlinear systems | en_US |
| dc.subject | receding horizon control | en_US |
| dc.subject | VLSI array processors | en_US |
| dc.subject | optimization | en_US |
| dc.title | Architecture and operations of the VLSI array processors for implementing a receding horizon controller | en_US |
| dc.type | Proceedings Paper | en_US |
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