Highly-integrated, quad bands Delta Sigma fractional-N frequency synthesizer design in 0.18-mu m standard CMOS process

dc.citation.epage	1545	en_US
dc.citation.spage	1542	en_US
dc.contributor.author	Chen, Cheng-Hung	en_US
dc.contributor.author	Lien, Wei-Cheng	en_US
dc.contributor.author	Jou, Christina F.	en_US
dc.contributor.department	電信工程研究所	zh_TW
dc.contributor.department	Institute of Communications Engineering	en_US
dc.date.accessioned	2014-12-08T15:25:20Z
dc.date.available	2014-12-08T15:25:20Z
dc.date.issued	2005	en_US
dc.description.abstract	A highly-integrated, quad bands frequency synthesizer (802.11a/b/g and GSM/DCS1800) is presented in this paper. This circuit is a single-path solution and the chip size is only half of the other dual-band frequency synthesizer works. By 50% frequency division technique, the quad-bands signals can be generated. Total power consumption for simultaneously quad-bands operation is 105mW, with apply voltage of 1.8V. Die area is 1.62mm(2).	en_US
dc.identifier.isbn	0-7803-9433-X	en_US
dc.identifier.journal	2005 ASIA-PACIFIC MICROWAVE CONFERENCE PROCEEDINGS, VOLS 1-5	en_US
dc.identifier.uri	https://ir.lib.nycu.edu.tw/handle/11536/17714
dc.identifier.wosnumber	WOS:000237449902037
dc.language.iso	en_US	en_US
dc.title	Highly-integrated, quad bands Delta Sigma fractional-N frequency synthesizer design in 0.18-mu m standard CMOS process	en_US
dc.type	Proceedings Paper	en_US

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