Spacer technique to fabricate pSi TFTs with 50nm nanowire channels

Abstract

In this work, polycrystalline silicon thin-film transistors (poly-Si TFTs) with 50-nm nanowire (NW) channels fabricated without advanced photolithograph v I v using a sidewall spacer formation technique are proposed for the first time. Because the poly gate electrode is perpendicularly across poly-Si NW channels to form a tri-gate-like structure, the proposed poly-Si NW TFT owns an outstanding gate controllability. In summary, a simple and low-cost scheme is proposed to fabricate high-performance poly-Si NW TFT suitable for future display manufacturing and practical applications.