Methodology to evaluate the robustness of integrated circuits under Cable Discharge Event

dc.citation.epage	502	en_US
dc.citation.spage	499	en_US
dc.contributor.author	Lai, Tai-Xiang	en_US
dc.contributor.author	Ker, Ming-Dou	en_US
dc.contributor.department	電子工程學系及電子研究所	zh_TW
dc.contributor.department	Department of Electronics Engineering and Institute of Electronics	en_US
dc.date.accessioned	2014-12-08T15:25:20Z
dc.date.available	2014-12-08T15:25:20Z
dc.date.issued	2005	en_US
dc.description.abstract	Cable Discharge Event (CDE) has been the main cause which damages the Ethernet interface. The transmission line pulsing (TLP) system has been the most important method to observe electric characteristics of the device under human-body-model (HBM) ESD stress. In this work, the long-pulse transmission line pulsing (LP-TLP) system is proposed to simulate the influence of CDE on the Ethernet integrated circuits, and the results are compared with conventional 100-ns TLP system. The experimental results have shown that the CDE robustness of NMOS device in a 0.25-mu m CMOS technology is much worse than its HBM electrostatic discharge robustness.	en_US
dc.identifier.isbn	978-0-7803-9339-4	en_US
dc.identifier.journal	2005 IEEE CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS, PROCEEDINGS	en_US
dc.identifier.uri	https://ir.lib.nycu.edu.tw/handle/11536/17725
dc.identifier.wosnumber	WOS:000245210600108
dc.language.iso	en_US	en_US
dc.title	Methodology to evaluate the robustness of integrated circuits under Cable Discharge Event	en_US
dc.type	Proceedings Paper	en_US

Files

Now showing 1 - 1 of 1