A New Programming Scheme for the Improvement of Program Disturb Characteristics in Scaled NAND Flash Memory

dc.citation.epage2773en_US
dc.citation.issue10en_US
dc.citation.spage2767en_US
dc.citation.volume59en_US
dc.citation.woscount0
dc.contributor.authorShirota, Riichiroen_US
dc.contributor.authorHuang, Chen-Haoen_US
dc.contributor.authorNagai, Shinjien_US
dc.contributor.authorSakamoto, Yoshinorien_US
dc.contributor.authorLi, Fu-Haien_US
dc.contributor.authorMitiukhina, Ninaen_US
dc.contributor.authorArakawa, Hidekien_US
dc.contributor.department電信工程研究所zh_TW
dc.contributor.departmentInstitute of Communications Engineeringen_US
dc.date.accessioned2014-12-08T15:24:12Z
dc.date.available2014-12-08T15:24:12Z
dc.date.issued2012-10-01en_US
dc.description.abstractThis paper investigates the new programming scheme to reduce the program disturb in the NAND Flash memory. Program disturb characteristics are determined by the unwilling electron injections in the floating gate of the unselected cells during programming. Thus, the key point to improve the program disturb characteristics is how to suppress the electron injection in the unselected cells. This requirement can be implemented by reducing the number of electrons in the unselected NAND strings prior to programming. By applying negative bias to all the word lines in the selected block, excess electrons can be removed from the channel and source/drain regions into the bit line or the source line using drift and diffusion mechanisms, and also electrons in the surface states can be recombined with accumulated holes before programming. After the pretreatment of electron reduction in the NAND string, a normal NAND program sequence follows. The advantage of the pretreatment before programming has been verified by measuring the 8-Gb NAND Flash memory with a 50-nm technology node. Significant reduction of the threshold voltage shift was observed even after the severe program disturb stress, which corresponds to around 30 times of the programming of the 2 bit/cell operation.en_US
dc.identifier.doi10.1109/TED.2012.2208462en_US
dc.identifier.issn0018-9383en_US
dc.identifier.journalIEEE TRANSACTIONS ON ELECTRON DEVICESen_US
dc.identifier.urihttp://dx.doi.org/10.1109/TED.2012.2208462en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/16814
dc.identifier.wosnumberWOS:000309132200029
dc.language.isoen_USen_US
dc.subjectFlash memoryen_US
dc.subjectFowler-Nordheim (FN) tunnelingen_US
dc.subjectjunction leakage (J/L)en_US
dc.subjectNAND cellen_US
dc.subjectprogram disturben_US
dc.subjectselect gate (SG)en_US
dc.subjectsurface stateen_US
dc.titleA New Programming Scheme for the Improvement of Program Disturb Characteristics in Scaled NAND Flash Memoryen_US
dc.typeArticleen_US

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