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張力型矽鍺奈米CMOS元件通道工程及可靠性關鍵問題研究(III)

dc.contributor.author莊紹勳en_US
dc.contributor.authorChung Steve Sen_US
dc.contributor.department國立交通大學電子工程學系及電子研究所zh_TW
dc.date.accessioned2014-12-13T10:51:52Z
dc.date.available2014-12-13T10:51:52Z
dc.date.issued2007en_US
dc.description.sponsorship行政院國家科學委員會zh_TW
dc.identifier.govdocNSC96-2221-E009-185zh_TW
dc.identifier.urihttps://www.grb.gov.tw/search/planDetail?id=1473703&docId=264692en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/102959
dc.language.isozh_TWen_US
dc.title張力型矽鍺奈米CMOS元件通道工程及可靠性關鍵問題研究(III)zh_TW
dc.titleKey Issues of Channel Engineering and Reliability for Strained-Si/SiGe Nanometer Gate Length CMOS Devices(III)en_US
dc.typePlanen_US

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