用於軟體無線電基頻處理之系統晶片設計技術-子計畫三:數位訊號處理器與可重置加速器之設計(III)
| dc.contributor.author | 劉志尉 | en_US |
| dc.contributor.author | Chih-WeiLiu | en_US |
| dc.contributor.department | 交通大學電子工程系 | zh_TW |
| dc.date.accessioned | 2014-12-13T10:31:28Z | |
| dc.date.available | 2014-12-13T10:31:28Z | |
| dc.date.issued | 2004 | en_US |
| dc.description.sponsorship | 行政院國家科學委員會 | zh_TW |
| dc.identifier.govdoc | NSC93-2220-E009-034 | zh_TW |
| dc.identifier.uri | https://www.grb.gov.tw/search/planDetail?id=1031005&docId=196439 | en_US |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/90958 | |
| dc.language.iso | zh_TW | en_US |
| dc.title | 用於軟體無線電基頻處理之系統晶片設計技術-子計畫三:數位訊號處理器與可重置加速器之設計(III) | zh_TW |
| dc.title | The Design of DSP Processor Core and Configurable Accelerator(III) | en_US |
| dc.type | Plan | en_US |
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