適用於10Gb/s有線通訊之類比前端積體電路設計技術
| dc.contributor.author | 蔡嘉明 | en_US |
| dc.contributor.author | Tsai Chia-Ming | en_US |
| dc.contributor.department | 國立交通大學電子工程學系及電子研究所 | zh_TW |
| dc.date.accessioned | 2014-12-13T10:45:16Z | |
| dc.date.available | 2014-12-13T10:45:16Z | |
| dc.date.issued | 2010 | en_US |
| dc.description.sponsorship | 行政院國家科學委員會 | zh_TW |
| dc.identifier.govdoc | NSC98-2221-E009-136-MY2 | zh_TW |
| dc.identifier.uri | https://www.grb.gov.tw/search/planDetail?id=2010304&docId=328931 | en_US |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/100322 | |
| dc.language.iso | zh_TW | en_US |
| dc.title | 適用於10Gb/s有線通訊之類比前端積體電路設計技術 | zh_TW |
| dc.title | Analog Front-End IC Design for 10Gb/s Wireline Communication Applications | en_US |
| dc.type | Plan | en_US |
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