CHARACTERISTICS OF SELF-INDUCED LIGHTLY-DOPED-DRAIN POLYCRYSTALLINE SILICON THIN-FILM TRANSISTORS WITH LIQUID-PHASE DEPOSITION SIO2 AS GATE-INSULATOR AND PASSIVATION-LAYER

dc.citation.epage314en_US
dc.citation.issue2en_US
dc.citation.spage307en_US
dc.citation.volume42en_US
dc.citation.woscount19
dc.contributor.authorYEH, CFen_US
dc.contributor.authorYANG, TZen_US
dc.contributor.authorCHEN, TJen_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.date.accessioned2014-12-08T15:03:33Z
dc.date.available2014-12-08T15:03:33Z
dc.date.issued1995-02-01en_US
dc.description.abstractAs the passivation layer on the top of undoped offset region for offset-gate structured poly-Si TFTs is exposed to hydrogen plasma, a lightly-doped-like drain region could be equivalently self-induced. The hydrogenated polycrystalline silicon thin-film transistor of this structure, named self-induced Lightly-doped-drain (SI-LDD) poly-Si TFTs, was first developed with liquid-phase deposition oxide as both the gate insulator and the passivation layer. This paper describes the optimum hydrogenation condition, and the electrical characteristics for the novel SI-LDD poly-Si TFTs. The effects of DC electrical stress on SI-LDD poly-Si TFTs are also described. Finally a model is proposed to explain the degradation phenomena observed in our SI-LDD devices.en_US
dc.identifier.doi10.1109/16.370064en_US
dc.identifier.issn0018-9383en_US
dc.identifier.journalIEEE TRANSACTIONS ON ELECTRON DEVICESen_US
dc.identifier.urihttp://dx.doi.org/10.1109/16.370064en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/2081
dc.identifier.wosnumberWOS:A1995QD76800016
dc.language.isoen_USen_US
dc.titleCHARACTERISTICS OF SELF-INDUCED LIGHTLY-DOPED-DRAIN POLYCRYSTALLINE SILICON THIN-FILM TRANSISTORS WITH LIQUID-PHASE DEPOSITION SIO2 AS GATE-INSULATOR AND PASSIVATION-LAYERen_US
dc.typeArticleen_US

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