Fabrication of High Electrical Performance NILC-TFTs Using FSG Buffer Layer
| dc.citation.epage | 404 | en_US |
| dc.citation.issue | 1 | en_US |
| dc.citation.spage | 401 | en_US |
| dc.citation.volume | 28 | en_US |
| dc.contributor.author | Chen, C. C. | en_US |
| dc.contributor.author | Wu, Y. C. | en_US |
| dc.contributor.author | Tung, T. F. | en_US |
| dc.contributor.author | Wu, H. Y. | en_US |
| dc.contributor.department | 材料科學與工程學系 | zh_TW |
| dc.contributor.department | Department of Materials Science and Engineering | en_US |
| dc.date.accessioned | 2014-12-08T15:29:05Z | |
| dc.date.available | 2014-12-08T15:29:05Z | |
| dc.date.issued | 2010 | en_US |
| dc.description.abstract | Fluorinated-silicate-glass (FSG) was combined with Ni-metal-induced lateral crystallization (NILC) polycrystalline silicon thin-film transistors (poly-Si TFTs). It was found that the electrical performances were improved because the trap-state density was decreased by fluorine-ion passivation. Moreover, FSG-NILC-TFTs possess high immunity against the hot-carrier stress and, thereby, exhibit better reliability. | en_US |
| dc.identifier.doi | 10.1149/1.3375627 | en_US |
| dc.identifier.isbn | 978-1-60768-141-0 | en_US |
| dc.identifier.issn | 1938-5862 | en_US |
| dc.identifier.journal | ADVANCED GATE STACK, SOURCE/DRAIN, AND CHANNEL ENGINEERING FOR SI-BASED CMOS 6: NEW MATERIALS, PROCESSES, AND EQUIPMENT | en_US |
| dc.identifier.uri | http://dx.doi.org/10.1149/1.3375627 | en_US |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/20986 | |
| dc.identifier.wosnumber | WOS:000313489900045 | |
| dc.language.iso | en_US | en_US |
| dc.title | Fabrication of High Electrical Performance NILC-TFTs Using FSG Buffer Layer | en_US |
| dc.type | Proceedings Paper | en_US |