VERTICAL TRANSISTOR AND A METHOD OF FABRICATING THE SAME
| dc.citation.patentcountry | USA | zh_TW |
| dc.citation.patentnumber | 20110284949 | zh_TW |
| dc.contributor.author | Meng Hsin-Fei | en_US |
| dc.contributor.author | Zan Hsiao-Wen | en_US |
| dc.contributor.author | Chao Yu-Chiang | en_US |
| dc.date.accessioned | 2014-12-16T06:15:20Z | |
| dc.date.available | 2014-12-16T06:15:20Z | |
| dc.date.issued | 2011-11-24 | en_US |
| dc.description.abstract | A vertical transistor and a method of fabricating the vertical transistor are provided. The vertical transistor has a substrate, a first electrode formed on the substrate, a first insulation layer formed on the first electrode, with a portion of the first electrode exposed from the first insulation layer and having a thickness greater than 50 nm and no more than 300 nm, a grid electrode formed on the first insulation layer, a semiconductor layer formed on the first electrode, and a second electrode formed on the semiconductor layer. | zh_TW |
| dc.identifier.govdoc | H01L029/78 | zh_TW |
| dc.identifier.govdoc | H01L021/336 | zh_TW |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/105244 | |
| dc.language.iso | zh_TW | en_US |
| dc.title | VERTICAL TRANSISTOR AND A METHOD OF FABRICATING THE SAME | zh_TW |
| dc.type | Patents | en_US |