A new output buffer for 3.3-V PCI-X application in a 0.13-mu m 1/2.5-V

dc.citation.epage	115	en_US
dc.citation.spage	112	en_US
dc.contributor.author	Chen, SL	en_US
dc.contributor.author	Ker, MD	en_US
dc.contributor.department	電機學院	zh_TW
dc.contributor.department	College of Electrical and Computer Engineering	en_US
dc.date.accessioned	2014-12-08T15:25:44Z
dc.date.available	2014-12-08T15:25:44Z
dc.date.issued	2004	en_US
dc.description.abstract	An output buffer with low-voltage devices to driver high-voltage signals for PCI-X applications is proposed in this paper. Because PCI-X is a 3.3-V interface, the high-voltage gate-oxide stress is a serious problem to design PCI-X l/O circuits in a 0.13-mum 1/2.5-V CMOS process. The simulation results show that the proposed output buffer can be operated at 133 MHz without causing high-voltage gate-oxide stress problem in the 3.3-V P I-X interface. Besides, a level converter with only IN and 2.5-V devices that can converter 0/1-V voltage swing to 1/3.3-V voltage swing is also proposed in this paper. The testchip to verify this new proposed output buffer is now under fabrication. The measured results will be shown in the presentation.	en_US
dc.identifier.isbn	0-7803-8637-X	en_US
dc.identifier.journal	PROCEEDINGS OF 2004 IEEE ASIA-PACIFIC CONFERENCE ON ADVANCED SYSTEM INTEGRATED CIRCUITS	en_US
dc.identifier.uri	https://ir.lib.nycu.edu.tw/handle/11536/18148
dc.identifier.wosnumber	WOS:000224435400024
dc.language.iso	en_US	en_US
dc.title	A new output buffer for 3.3-V PCI-X application in a 0.13-mu m 1/2.5-V	en_US
dc.type	Proceedings Paper	en_US

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