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Scalable VLSI architectures for full-search block matching algorithms

dc.citation.epage1038en_US
dc.citation.spage1035en_US
dc.contributor.authorYeh, YHen_US
dc.contributor.authorLee, CYen_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.date.accessioned2014-12-08T15:27:33Z
dc.date.available2014-12-08T15:27:33Z
dc.date.issued1996en_US
dc.identifier.isbn0-7803-3259-8en_US
dc.identifier.journalINTERNATIONAL CONFERENCE ON IMAGE PROCESSING, PROCEEDINGS - VOL IIen_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/19796
dc.identifier.wosnumberWOS:A1996BG63F00258
dc.language.isoen_USen_US
dc.titleScalable VLSI architectures for full-search block matching algorithmsen_US
dc.typeProceedings Paperen_US

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