Pre-charge sample-and-hold circuit
| dc.citation.patentcountry | USA | zh_TW |
| dc.citation.patentnumber | 20080180136 | zh_TW |
| dc.contributor.author | Wu, Jieh-Tsorng | en_US |
| dc.contributor.author | Lee, Zwei-Mei | en_US |
| dc.contributor.author | Wang, Cheng-Yeh | en_US |
| dc.date.accessioned | 2014-12-16T06:15:56Z | |
| dc.date.available | 2014-12-16T06:15:56Z | |
| dc.date.issued | 2008-07-31 | en_US |
| dc.description.abstract | A precharge sample-and-hold circuit is formed by coupling a buffer with an input port and making use of a switch to conduct the circuit between the buffer and a total load capacitor for precharging according the state of a sample-and-hold circuit. When the sample-and-hold circuit is in the sample mode, it precharges the total load capacitor. When the sample-and-hold circuit is in the hold mode, the influence to the sampled signal is further reduced due to the precharging. The requirements of swing rate, output voltage swing, gain-bandwidth product for the opamps can therefore be reduced, hence being applicable to the realization of the design of advanced fabrication technologies of low supply voltages. | zh_TW |
| dc.identifier.govdoc | G11C027/02 | zh_TW |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/105581 | |
| dc.language.iso | zh_TW | en_US |
| dc.title | Pre-charge sample-and-hold circuit | zh_TW |
| dc.type | Patents | en_US |