Compressed Sensing Recovery Algorithms and VLSI Implementation

dc.contributor.author	Lin, Kuan-Ting	en_US
dc.contributor.author	Yang, Kai-Jiun	en_US
dc.contributor.author	Lin, Pu-Hsuan	en_US
dc.contributor.author	Tsai, Shang-Ho	en_US
dc.contributor.department	電機工程學系	zh_TW
dc.contributor.department	Department of Electrical and Computer Engineering	en_US
dc.date.accessioned	2014-12-08T15:34:48Z
dc.date.available	2014-12-08T15:34:48Z
dc.date.issued	2013	en_US
dc.description.abstract	This paper proposes two recovery algorithms modified from subspace pursuit(SP) for compressed sensing problems. These algorithms can reduce the complexity of SP and maintain high recovery rate. Complexity analysis and simulation results are provided to demonstrate the improvements. Additionally this work has implemented the VLSI circuit APR of the proposed algorithm using TSMC 90 nm process. The target clock frequency is 100MHz, and the corresponding APR dimension is 11.69mm(2). Based on the post-layout simulation the average power consumption is 431 mW.	en_US
dc.identifier.journal	2013 ASIA-PACIFIC SIGNAL AND INFORMATION PROCESSING ASSOCIATION ANNUAL SUMMIT AND CONFERENCE (APSIPA)	en_US
dc.identifier.uri	https://ir.lib.nycu.edu.tw/handle/11536/23691
dc.identifier.wosnumber	WOS:000331094400124
dc.language.iso	en_US	en_US
dc.title	Compressed Sensing Recovery Algorithms and VLSI Implementation	en_US
dc.type	Proceedings Paper	en_US

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