A 2.5-V 14-bit, 180-mW cascaded Sigma Delta ADC for ADSL2+ application

Abstract

This paper presents a sigma-delta (Sigma Delta) analog-to-digital converter (ADC) for the extended bandwidth asymmetric digital subscriber line application. The core of the ADC is a cascaded 2-1-1 Sigma Delta modulator that employs a resonator-based topology in the first stage, three tri-level quantizers, and two different pairs of reference voltages. As shown in the experimental result, for a 2.2-MHz signal bandwidth, the ADC achieves a dynamic range of 86 dB and a peak signal-to-noise and distortion ratio of 78 dB with an oversampling ratio of 16. It is implemented in a 0.25 mu tm CMOS technology, in a 2.8 mm(2) active area including decimation filter and reference voltage buffers, and dissipates 180 mW from a 2.5-V power supply.