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A 1.5 V CMOS balanced differential switched-capacitor filter with internal clock boosters

dc.citation.epage1028en_US
dc.citation.spage1025en_US
dc.contributor.authorWU, CYen_US
dc.contributor.authorWEY, WSen_US
dc.contributor.authorYU, TCen_US
dc.contributor.department電機學院zh_TW
dc.contributor.departmentCollege of Electrical and Computer Engineeringen_US
dc.date.accessioned2014-12-08T15:27:47Z
dc.date.available2014-12-08T15:27:47Z
dc.date.issued1995en_US
dc.identifier.isbn0-7803-2570-2en_US
dc.identifier.issn0277-674Xen_US
dc.identifier.journal1995 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-3en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/20032
dc.identifier.wosnumberWOS:A1995BD85N00257
dc.language.isoen_USen_US
dc.titleA 1.5 V CMOS balanced differential switched-capacitor filter with internal clock boostersen_US
dc.typeProceedings Paperen_US

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