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An Integrated 0.56THz Frequency Synthesizer with 21GHz Locking Range and-74dBc/Hz Phase Noise at 1MHz Offset in 65nm CMOS

dc.citation.epageU733en_US
dc.citation.spage36en_US
dc.citation.volume59en_US
dc.citation.woscount0en_US
dc.contributor.authorZhao, Yanen_US
dc.contributor.authorChen, Zuow-Zunen_US
dc.contributor.authorVirbila, Gabrielen_US
dc.contributor.authorXu, Yinuoen_US
dc.contributor.authorAl Hadi, Richarden_US
dc.contributor.authorKim, Yanghyoen_US
dc.contributor.authorTang, Adrianen_US
dc.contributor.authorReck, Theodoreen_US
dc.contributor.authorChen, Huan-Nengen_US
dc.contributor.authorJou, Chewnpuen_US
dc.contributor.authorHsueh, Fu-Lungen_US
dc.contributor.authorChang, Mau-Chung Franken_US
dc.contributor.department交大名義發表zh_TW
dc.contributor.departmentNational Chiao Tung Universityen_US
dc.date.accessioned2017-04-21T06:49:55Z
dc.date.available2017-04-21T06:49:55Z
dc.date.issued2016en_US
dc.identifier.isbn978-1-4673-9467-3en_US
dc.identifier.issn0193-6530en_US
dc.identifier.journal2016 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE (ISSCC)en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/136196
dc.identifier.wosnumberWOS:000382151400005en_US
dc.language.isoen_USen_US
dc.titleAn Integrated 0.56THz Frequency Synthesizer with 21GHz Locking Range and-74dBc/Hz Phase Noise at 1MHz Offset in 65nm CMOSen_US
dc.typeProceedings Paperen_US

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