A Third-Order Continuous-Time Sigma-Delta Modulator for Bluetooth
| dc.citation.epage | 250 | en_US |
| dc.citation.spage | 247 | en_US |
| dc.contributor.author | Yang, Wen-Lin | en_US |
| dc.contributor.author | Hsieh, Wen-Hung | en_US |
| dc.contributor.author | Hung, Chung-Chih | en_US |
| dc.contributor.department | 電信工程研究所 | zh_TW |
| dc.contributor.department | Institute of Communications Engineering | en_US |
| dc.date.accessioned | 2014-12-08T15:41:14Z | |
| dc.date.available | 2014-12-08T15:41:14Z | |
| dc.date.issued | 2009 | en_US |
| dc.description.abstract | This paper presents the design of a third-order continuous-time (CT) single-bit active-RC sigma-delta (Sigma Delta) modulator for Bluetooth application. Through the use of the architecture, cascade of resonators with distributed feedback (CRFB), the signal bandwidth can be improved without increasing the order of the modulator. All integrators are implemented by active-RC type to have better linearity. Furthermore, in order to reduce the effect of the clock jitter, the feedback digital-to-analog converter (DAC) shape is realized by non-return-to-zero (NRZ). The modulator is designed in a standard digital 0.18 mu m CMOS process with a chip area of 1.32x1.23 mm(2). The measurement results show that the modulator achieves 56.8dB SNDR and 60dB dynamic range over 1MHz signal bandwidth, consuming 22.2mW at 1.8V supply. | en_US |
| dc.identifier.doi | 10.1109/VDAT.2009.5158141 | en_US |
| dc.identifier.isbn | 978-1-4244-2781-9 | en_US |
| dc.identifier.journal | 2009 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION AND TEST (VLSI-DAT), PROCEEDINGS OF TECHNICAL PROGRAM | en_US |
| dc.identifier.uri | http://dx.doi.org/10.1109/VDAT.2009.5158141 | en_US |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/28042 | |
| dc.identifier.wosnumber | WOS:000271941200062 | |
| dc.language.iso | en_US | en_US |
| dc.title | A Third-Order Continuous-Time Sigma-Delta Modulator for Bluetooth | en_US |
| dc.type | Proceedings Paper | en_US |