1. 目前位置：
郭柏儀

郭柏儀 KUO, PO-YI

電子郵件／E-mail：Kuopoyi.ee91g@gmail.com

服務單位／Department：理學院 ／ 電子物理學系

著作期間／Publish Period：2001 - 2013-08-01

著作統計／Statistics

Article（20）
Patents（1）
Thesis（2）

Article

序號
No.		 標題
Title		 著作日期
Date
1 Low-Temperature Polycrystalline-Silicon Tunneling Thin-Film Transistors With MILC
 2013-08-01
2 Reliability Analysis of Symmetric Vertical-Channel Nickel-Salicided Poly-Si Thin-Film Transistors
 2012-08-01
3 High-Performance Poly-Si Thin-Film Transistors With L-Fin Channels
 2012-02-01
4 Symmetric Vertical-Channel Nickel-Salicided Poly-Si Thin-Film Transistors With Self-Aligned Oxide Overetching Structures
 2011-07-01
5 Novel Sub-10-nm Gate-All-Around Si Nanowire Channel Poly-Si TFTs With Raised Source/Drain
 2011-02-01
6 High-Performance Poly-Si TFTs of Top-Gate with High-kappa Metal-Gate Combine the Laser Annealed Channel and Glass Substrate 2011-01-01
7 Novel Symmetric Vertical-Channel Ni-Salicided Poly-Si Thin-Film Transistors With High ON/OFF-Current Ratio
 2010-11-01
8 Characteristics of SONOS-Type Flash Memory With In Situ Embedded Silicon Nanocrystals
 2010-08-01
9 The Characteristics of n- and p-Channel Poly-Si Thin-Film Transistors with Fully Ni-Salicided S/D and Gate Structure
 2010-01-01
10 Physical Mechanism of High-Programming-Efficiency Dynamic-Threshold Source-Side Injection in Wrapped-Select-Gate SONOS for NOR-Type Flash Memory
 2009-11-01
11 MILC-TFT With High-kappa Dielectrics for One-Time-Programmable Memory Application
 2009-09-01
12 Poly-Si Thin-Film Transistor Nonvolatile Memory Using Ge Nanocrystals as a Charge Trapping Layer Deposited by the Low-Pressure Chemical Vapor Deposition
 2009-03-01
13 Vertical n-Channel Poly-Si Thin-Film Transistors With Symmetric S/D Fabricated by Ni-Silicide-Induced Lateral-Crystallization Technology
 2009-03-01
14 SONOS memories with embedded silicon nanocrystals in nitride
 2008-07-01
15 Characteristics of self-aligned Si/Ge T-gate poly-Si thin-film transistors with high ON/OFF current ratio
 2007-05-01
16 The impact of deep Ni salicidation and NH3 plasma treatment on nano-SOI FinFETs
 2006-10-01
17 High-performance poly-Si TFTs with fully Ni-self-aligned silicided S/D and gate structure
 2006-04-01
18 Suppression of the floating-body effect in poly-Si thin-film transistors with self-aligned Schottky barrier source and ohmic body contact structure
 2004-09-01
19 Short-channel poly-Si thin-film transistors with ultrathin channel and self-aligned tungsten-clad source/drain 2004-01-01
20 A study of parasitic resistance effects in thin-channel polycrystalline silicon TFTs with tungsten-clad source/drain
 2003-08-01

Patents

序號
No.		 標題
Title		 著作日期
Date
1 具有奈米線通道之半導體元件的製程及藉此形成之半導體元件
 2013-07-01

Thesis

序號
No.		 標題
Title		 著作日期
Date
1 應用鎳矽化物與鍺於新穎結構複晶矽薄膜電晶體之研究
 2007
2 選擇性沉積鎢汲極源極複晶矽薄膜電晶體之製作與研究 2001
理學院