國立交通大學機構典藏：研究人員|奈米電子與系統研究中心|林鴻志

林鴻志 Lin, Horng-Chih

電子郵件／E-mail：hclin@faculty.nctu.edu.tw

服務單位／Department：其他／奈米電子與系統研究中心

著作期間／Publish Period：1970-01-01 - 2014-12-01

著作統計／Statistics

Article（69）

Books（1）

Patents（15）

Plan（17）

Proceedings Paper（14）

Thesis（102）

Article

序號 No.	標題 Title	著作日期 Date
1	Submicron organic thin-film transistors fabricated by film profile engineering method	2014-07-28
2	Electrical characteristics of amorphous In-Ga-Zn-O thin-film transistors prepared by radio frequency magnetron sputtering with varying oxygen flows	2014-07-01
3	Fabrication and characterization of field-effect transistors with suspended-nanowire channels	2014-05-01
4	The effects of channel doping concentration for n-type junction-less double-gate poly-Si nanostrip transistors	2014-05-01
5	Effects of Ga2O3 deposition power on electrical properties of cosputtered In-Ga-Zn-O semiconductor films and thin-film transistors	2014-05-01
6	Implementation of Film Profile Engineering in the Fabrication of ZnO Thin-Film Transistors	2014-05-01
7	Fabrication of tri-gated junctionless poly-Si transistors with I-line based lithography	2014-04-01
8	Gate-all-around floating-gate memory device with triangular poly-Si nanowire channels	2014-04-01
9	Investigation of p-type junction-less independent double-gate poly-Si nano-strip transistors	2014-01-01
10	Novel gate-all-around polycrystalline silicon nanowire memory device with HfAlO charge-trapping layer	2014-01-01
11	Low-voltage high-speed programming/erasing floating-gate memory device with gate-all-around polycrystalline silicon nanowire	2013-10-07
12	Performance Improvement in RF LDMOS Transistors Using Wider Drain Contact	2013-09-01
13	Fabrication of High-Performance ZnO Thin-Film Transistors With Submicrometer Channel Length	2013-09-01
14	Effect of ITO electrode with different oxygen contents on the electrical characteristics of HfOx RRAM devices	2013-09-01
15	Channel Thickness Effect on High-Frequency Performance of Poly-Si Thin-Film Transistors	2013-08-01
16	Novel Method for Fabrication of Tri-Gated Poly-Si Nanowire Field-Effect Transistors With Sublithographic Channel Dimensions	2013-06-01
17	A New Methodology for Probing the Electrical Properties of Heavily Phosphorous-Doped Polycrystalline Silicon Nanowires	2013-04-01
18	A Novel Charge-Trapping-Type Memory With Gate-All-Around Poly-Si Nanowire and HfAlO Trapping Layer	2013-03-01
19	Characteristics of Planar Junctionless Poly-Si Thin-Film Transistors With Various Channel Thickness	2013-03-01
20	Low-Operating-Voltage Ultrathin Junctionless Poly-Si Thin-Film Transistor Technology for RF Applications	2012-11-01
21	Characterizations of polycrystalline silicon nanowire thin-film transistors enhanced by metal-induced lateral crystallization	2012-11-01
22	A Novel Scheme for Fabricating CMOS Inverters With Poly-Si Nanowire Channels	2012-06-01
23	Characteristics of n-Type Asymmetric Schottky-Barrier Transistors with Silicided Schottky-Barrier Source and Heavily n-Type Doped Channel and Drain	2012-06-01
24	Performance Enhancement of Thin-Film Transistors With Suspended Poly-Si Nanowire Channels by Embedding Silicon Nanocrystals in Gate Nitride	2012-03-01
25	A junctionless SONOS nonvolatile memory device constructed with in situ-doped polycrystalline silicon nanowires	2012-02-29
26	Resistive switching characteristics of multilayered (HfO2/Al2O3)(n) n=19 thin film	2012-02-01
27	Analytical Model of Subthreshold Current and Threshold Voltage for Fully Depleted Double-Gated Junctionless Transistor	2012-02-01
28	Characteristics of n-Type Junctionless Poly-Si Thin-Film Transistors With an Ultrathin Channel	2012-01-01
29	Read Characteristics of Independent Double-Gate Poly-Si Nanowire SONOS Devices	2011-11-01
30	Investigations of an Independent Double-Gated Polycrystalline Silicon Nanowire Thin Film Transistor for Nonvolatile Memory Operations	2011-08-01
31	Characterisation of a suspended nanowire channel thin-film transistor with sub-100 nm air gap	2011-07-01
32	Impacts of Nanocrystal Location on the Operation of Trap-Layer-Engineered Poly-Si Nanowired Gate-All-Around SONOS Memory Devices	2011-07-01
33	Gate-All-Around Junctionless Transistors With Heavily Doped Polysilicon Nanowire Channels	2011-04-01
34	Fabrication of sub-100-nm metal-oxide-semiconductor field-effect transistors with asymmetrical source/drain using I-line double patterning technique	2011-03-01
35	Impacts of Multiple-Gated Configuration on the Characteristics of Poly-Si Nanowire SONOS Devices	2011-03-01
36	Effect of Ni residues on the performance and the uniformity of nickel-induced lateral crystallization polycrystalline silicon nanowire thin-film transistors	2010-11-01
37	A study on low temperature transport properties of independent double-gated poly-Si nanowire transistors	2010-10-29
38	In Situ Doped Source/Drain for Performance Enhancement of Double-Gated Poly-Si Nanowire Transistors	2010-07-01
39	Operation of a Novel Device With Suspended Nanowire Channels	2010-05-01
40	Trigated Poly-Si Nanowire SONOS Devices for Flat-Panel Applications	2010-05-01
41	Origins of Performance Enhancement in Independent Double-Gated Poly-Si Nanowire Devices	2010-04-01
42	A comparison of plasma-induced damage on the reliability between high-k/metal-gate and SiO(2)/poly-gate complementary metal oxide semiconductor technology	2010-04-01
43	Insight into the performance enhancement of double-gated polycrystalline silicon thin-film transistors with ultrathin channel	2010-02-15
44	Characterization of AC Hot-Carrier Effects in Poly-Si Thin-Film Transistors	2009-11-01
45	Effects of independent double-gated configuration on polycrystalline-Si nonvolatile memory devices	2009-09-28
46	Electrostatic Discharge Robustness of Si Nanowire Field-Effect Transistors	2009-09-01
47	Poly-silicon nanowire field-effect transistor for ultrasensitive and label-free detection of pathogenic avian influenza DNA	2009-06-15
48	Performance Enhancement in Double-Gated Poly-Si Nanowire Transistors With Reduced Nanowire Channel Thickness	2009-06-01
49	Threshold-Voltage Fluctuation of Double-Gated Poly-Si Nanowire Field-Effect Transistor	2009-03-01
50	Origin of hysteresis in current-voltage characteristics of polycrystalline silicon thin-film transistors	2009-03-01
51	Performance Improvement of Polycrystalline Silicon Nanowire Thin-Film Transistors by a High-k Capping Layer	2009-02-01
52	Fabrication and Characterization of Multiple-Gated Poly-Si Nanowire Thin-Film Transistors and Impacts of Multiple-Gate Structures on Device Fluctuations	2008-11-01
53	A novel multiple-gate polycrystalline silicon nanowire transistor featuring an inverse-T gate	2008-07-01
54	Tr-gate Poly-Si Thin-Film Transistor with Nanowire Channels	2008-01-01
55	Water passivation effect on polycrystalline silicon nanowires	2007-11-12
56	An innovative understanding of metal-insulator-metal (MIM)-capacitor degradation under constant-current stress	2007-09-01
57	Effective density-of-states distribution of polycrystalline silicon thin-film transistors under hot-carrier degradation	2007-09-01
58	Impacts of a polycrystalline-silicon buffer layer on the performance and reliability of strained n-channel metal-oxide-semiconductor field-effect transistors with SiN capping	2007-03-19
59	High-performance poly-Si nanowire NMOS transistors	2007-03-01
60	Impacts of SiN-capping layer on the device characteristics and hot-carrier degradation of nMOSFETs	2007-03-01
61	Spatially and temporally resolving the degradation of n-channel poly-Si thin-film transistors under hot-carrier stressing	2007-03-01
62	Optimization of SiN film by varying precursor flow conditions and its impacts on strained channel NMOSFETs	2007-01-01
63	Improved hot carrier reliability in strained-channel NMOSFETS with TEOS buffer layer	2007-01-01
64	Characterizing the channel backscattering behavior in nanoscale strained complementary metal oxide semiconductor field-effect transistors	2006-11-01
65	Fabrication and characterization of nanowire transistors with solid-phase crystallized poly-Si channels	2006-10-01
66	Prospect of cobalt-mix-tetraethoxysilane method on localized lateral growth of carbon nanotubes for both p- and n-type field effect transistors	2006-09-01
67	Correlating drain-current with strain-induced mobility in nanoscale strained CMOSFETs	2006-08-01
68	A carbon nanotube field effect transistor with tunable conduction-type by electrostatic effects	2006-07-01
69	Low-temperature poly-Si nanowire junctionless devices with gate-all-around TiN/Al2O3 stack structure using an implant-free technique	1970-01-01

Books

序號 No.	標題 Title	著作日期 Date
1	國立交通大學電子工程系林鴻志教師升等送審資料論文集	2007

Patents

序號 No.	標題 Title	著作日期 Date
1	薄膜電晶體及其製作方法	2014-12-01
2	非揮發性半導體記憶體裝置	2014-10-01
3	時間可調性視訊編碼之快速時域預測模式選擇方法	2013-07-16
4	具懸浮式奈米通道之電晶體結構與其製造方法	2012-12-21
5	非揮發性半導體記憶體裝置	2012-12-16
6	サスペンデッドナノワイヤチャネルを有するトランジスタ構造とその製造方法	2012-02-24
7	適用於粗略與時間可調性視訊編碼之低複雜度宏塊模式決定與動態向量估計快速演算法	2011-10-11
8	具有奈米線通道之非揮發性記憶體元件及其製造方法	2011-04-01
9	具懸浮式奈米通道之電晶體結構與其製造方法	2010-05-01
10	サスペンデッドナノワイヤチャネルを有するトランジスタ構造とその製造方法	2009-04-09
11	具有奈米線通道之非揮發性記憶體元件及其製造方法	2009-03-16
12	NONVOLATILE MEMORY DEVICE WITH NANOWIRE CHANNEL AND METHOD FOR FABRICATING THE SAME	2009-03-12
13	適用於粗略與時間可調性視訊編碼之低複雜度宏塊模式決定與動態向量估計快速演算法	2009-03-01
14	矽奈米線場效電晶體裝置及作為奈米線生物感測與調控元件，及其製造	2008-03-01
15	奈米線場效電晶體裝置及作為奈米線生物感測與調控元件，及其製造	2007-03-01

Plan

序號 No.	標題 Title	著作日期 Date
1	金屬氧化物後段主動元件技術開發	2014
2	金屬氧化物後段主動元件技術開發	2013
3	面板低溫記憶體元件技術開發	2012
4	應用於三維邏輯電路與非揮發性記憶體之先進奈米線技術	2012
5	面板低溫記憶體元件技術開發	2011
6	應用於三維邏輯電路與非揮發性記憶體之先進奈米線技術	2011
7	應用於三維邏輯電路與非揮發性記憶體之先進奈米線技術	2010
8	用於先進邏輯元件件與感測器應用之新式矽奈米線電晶體技術	2009
9	用於先進邏輯元件件與感測器應用之新式矽奈米線電晶體技術	2008
10	用於先進邏輯元件件與感測器應用之新式矽奈米線電晶體技術	2007
11	具有形變通道之互補式金氧半電晶體載子穿輸與可靠性分析	2006
12	新式矽奈米線電晶體製作與分析	2006
13	矽奈米線之製備與相關元件之研製與分析	2005
14	奈米級先進絕緣層上覆矽(SOI)元件研製與分析	2004
15	多晶薄膜電晶體通道層缺陷分布分析與多晶鍺薄膜電晶體之研製	2004
16	高介電常數閘極介電層材料製備與可靠性分析	2003
17	電漿製程天線效應對超薄閘氧化層電晶體特性影響之研究	1999

Proceedings Paper

序號 No.	標題 Title	著作日期 Date
1	Relationships between the crystalline phase of an IGZO target and electrical properties of a-IGZO channel film	2012-01-01
2	The Degradation of MILC P-Channel Poly-Si TFTs under Dynamic Hot-Carrier Stress Using a Novel Test Structure	2011-01-01
3	A simple method for sub-100 nm pattern generation with I-line double-patterning technique	2010-05-01
4	Improved Performance of NILC Poly-Si Nanowire TFTs by Using Ni-Gettering	2010-01-01
5	Tri-gated Poly-Si Nanowire SONOS Devices	2009-01-01
6	A Novel Double-gated Nanowire TFT and Investigation of Its Size Dependency	2009-01-01
7	Impacts of a buffer layer and hydrogen-annealed wafers on the performance of strained-channel nMOSFETs with SiN-capping layer	2008-10-01
8	Impacts of SiN deposition parameters on n-channel metal-oxide-semiconductor field-effect-transistors	2008-10-01
9	A novel poly-Si nanowire TFT for nonvolatile memory applications	2008-01-01
10	Impacts of low-pressure chemical vapor deposition-SiN capping layer and lateral distribution of interface traps on hot-carrier stress of n-channel metal-oxide-semiconductor field-effect-transistors	2007-04-01
11	Spatially resolving the degradation of SPC thin-film transistors under AC stress	2007-01-01
12	Impacts of precursor flow rate and temperature of PECVD-SiN capping films on strained-channel NMOSFETs	2007-01-01
13	Improved NBTI in SiN-capped PMOSFETs with ultra-thin HfO2 buffer	2007-01-01
14	DC and AC NBTI stresses in pMOSFETs with PE-SiN capping	2006-01-01

Thesis

序號 No.	標題 Title	著作日期 Date
1	新穎多晶矽奈米線非揮發性記憶體之研製與分析	2013
2	非對稱金氧半場效電晶體及無接面多晶矽薄膜電晶體的研究	2013
3	具懸浮奈米線通道之場效電晶體和多晶矽奈米線互補式金氧半反相器的研製與特性分析	2013
4	藉由有機保護層提升a-IGZO 薄膜電晶體之穩定性及可靠度之探討	2013
5	薄膜形貌工程薄膜電晶體之單極性反向器之設計與製造	2013
6	以薄膜工程製作次微米無接面銦錫氧化物薄膜電晶體及其特性分析	2013
7	薄膜輪廓工法－氧化鋅薄膜電晶體之製作與特性分析	2013
8	一氧化錫薄膜電晶體的製作與特性分析	2013
9	氮化矽側壁硬式光罩方法製造多晶矽奈米線非揮發性記憶體元件之特性研究	2013
10	平面式獨立雙閘極多晶矽SONOS記憶體元件以及非對稱式蕭特基能障薄膜電晶體之製作與特性分析	2012
11	具獨立雙閘極之N型無接面奈米線電晶體的製作與特性分析	2012
12	利用雙重微影成像法製作多晶矽鰭式場效電晶體元件之特性研究	2012
13	射頻應用之寬汲極橫向擴散金氧半場效電晶體特性與模型參數分析	2012
14	N型多晶矽薄膜電晶體元件製作與高頻特性分析	2012
15	a-IGZO 薄膜電晶體的製作與特性分析	2012
16	未摻雜之氧化鋅薄膜電晶體的製作與特性分析	2012
17	以氧化鉿為介電層的電阻式記憶體之電性與分析	2012
18	N型無接面多晶矽薄膜電晶體之製作與特性分析	2012
19	次100奈米氧化鋅薄膜電晶體製作與特性分析	2012
20	新穎反轉式及無接面多閘極多晶矽奈米線薄膜電晶體特性與應用的探討	2011
21	具獨立雙閘極之多晶矽奈米線薄膜電晶體的研製與分析	2011
22	新穎多閘極多晶矽奈米線薄膜電晶體之研製與其應用	2011
23	高介電常數材料的特性分析及其在多晶矽奈米線非揮發性記憶體之應用	2011
24	利用雙重微影成像法製作P型金氧半場效電晶體之元件特性和可靠度研究	2011
25	具鎳矽化物源汲極之多晶矽奈米線互補式金氧半反相器元件的製程與特性分析	2011
26	通道截面形狀對多晶矽奈米線非揮發性記憶體元件操作特性影響之研究	2011
27	使用I-Line雙重曝光技術實現非對稱0.1μm P型金氧半場效電晶體與相關可靠度問題之研究	2010
28	具懸浮奈米線結構之新穎元件的製作與特性分析	2010
29	射頻橫向擴散金氧半場效電晶體之小信號特性分析與模型	2010
30	多晶鍺奈米線薄膜電晶體與無接面多晶矽奈米線場效電晶體製作與特性分析	2010
31	具有昇起式源/汲極之多晶鍺薄膜電晶體的元件製作與特性分析	2010
32	具獨立雙閘極之P型聚集模式多晶矽奈米線電晶體的製作與特性分析	2010
33	非對稱蕭特基能障薄膜電晶體與浮停閘極記憶體元件之製作與特性分析	2010
34	一種具懸浮奈米通道之元件製作與其分析模型	2010
35	a-IGZO 薄膜電晶體的製作與特性分析	2010
36	懸浮式奈米線通道電晶體於氣體感測器之應用與具懸浮式閘極之垂直電晶體特性研究	2010
37	用於H.264/MPEG-4 AVC可調式視訊編碼標準之快速編碼演算法設計	2009
38	一種具有懸浮奈米線通道之新式元件的研製與分析	2009
39	多晶矽薄膜電晶體與奈米線場效電晶體氣體感測器特性比較之研究	2009
40	使用I射線步進機的雙重圖形曝光技術以及其應用在元件製作之研究	2009
41	利用雙重微影成像法製作非對稱P型金氧半場效電晶體之研究	2009
42	新式多晶矽奈米線SONOS元件製作與特性分析	2009
43	多晶矽奈米線結合內嵌式奈米矽晶體之SONOS記憶體元件之研究	2009
44	利用雙重微影成像法製作非對稱N型金氧半場效電晶體之元件特性研究	2009
45	多晶矽奈米線薄膜電晶體之研製與應用於酸鹼感測器之研究	2009
46	金屬誘發側向結晶複晶矽P型多晶矽薄膜電晶體的元件特性及熱載子效應研究	2009
47	電漿製程導致先進互補式金氧半場效電晶體可靠度損壞之研究	2009
48	複晶矽奈米線通道在雙閘極倒T型結構上之製作與特性分析	2008
49	多晶鍺元件的研製與分析	2008
50	新式雙閘極複晶矽奈米線薄膜電晶體與記憶體元件	2008
51	利用新穎結構對P型複晶矽薄膜電晶體進行之熱載子衰退機制分析	2008
52	具有氮化矽覆蓋之形變通道金氧半場效電晶體特性與相關可靠性問題研究	2008
53	新穎矽奈米線元件之研製與應用	2008
54	利用一種新穎結構進行複晶矽薄膜電晶體之熱載子可靠性分析	2008
55	複晶矽薄膜電晶體的充放電機制用於記憶應用之研究	2007
56	金屬誘發側向結晶複晶矽薄膜電晶體可靠度課題及元件特性之研究	2007
57	新式複晶矽奈米線元件製作與特性分析	2007
58	複晶矽雙閘極薄膜電晶體特性及電性擾動分析	2007
59	雙閘極奈米線非揮發性記憶元件之研製與分析	2007
60	低溫多晶矽技術對多晶矽奈米線薄膜電晶體通道結晶特性影響之研究	2007
61	具倒T型閘極之多晶矽奈米線通道薄膜電晶體與氮化矽記憶體元件之製作與特性分析	2007
62	懸浮閘和SONOS非揮發性記憶體元件特性及可靠度分析之研究	2007
63	具有氮化矽覆蓋層之形變N型金氧半場效電晶體之性能及可靠度	2007
64	奈米尺寸之製程應變矽互補式金氧半場效電晶體之載子傳輸與負偏壓溫度不穩定之研究	2006
65	複晶矽薄膜電晶體中漏電流及可靠度課題之研究	2006
66	新穎元件結構之衰退機制分析	2006
67	緩衝層與經氫氣回火矽晶圓對具氮化矽覆蓋層之形變N型金氧半場效電晶體之元件特性及可靠度之影響	2006
68	利用低溫多晶矽技術於製造具有多晶矽奈米線通道的薄膜電晶體之研究	2006
69	電漿處理對雙閘極奈米線多晶矽薄膜電晶體影響之研究	2006
70	奈米線薄膜電晶體於生化感測應用之研究	2006
71	具有奈米線通道的薄膜電晶體之氮化矽記憶體元件特性分析	2006
72	電漿氣相輔助沉積氮化矽覆蓋層之形變N型金氧半場效電晶體之電流增強方法與可靠度之研究	2006
73	氫含量對於矽鍺閘極元件之特性與可靠度分析	2005
74	具有奈米線通道的矽鍺及雙閘極薄膜電晶體特性分析	2005
75	具有氮化矽覆蓋層之形變N型金氧半場效電晶體之元件特性與熱載子退化效應	2005
76	具有奈米線通道的多晶矽薄膜電晶體之特性改善	2005
77	Performance of SRAM with Nanoscale Transistors	2005
78	一個用來改善形變通道N型金氧半場效電晶體	2005
79	金氧半場效電晶體導通電流增強之方法與相關可靠性問題之研究	2005
80	具場引效汲極的蕭特基能障薄膜電晶體之研製與特性分析	2004
81	具有複晶矽鍺閘極與局部形變通道之P型金氧半場效電晶體元件製作與分析	2004
82	一種分析薄膜電晶體內完整能帶隙態位密度分佈的新穎方法	2003
83	超薄氮化矽閘極介電層之可靠度研究	2003
84	具有鉑金屬矽化物之P通道蕭特基複晶矽薄膜電晶體的製造與分析	2002
85	動態臨界電壓金氧半電晶體在不同溫度與結構之可靠性分析	2002
86	具副閘極之多晶矽薄膜電晶體製作與特性研究	2002
87	具奈米級通道寬度之矽化鈷蕭特基障位的複晶矽薄膜電晶體研究	2002
88	電子束鄰近效應的校正與具鰭狀通道之SOI場效電晶體	2002
89	The Effects of NBTI of PMOSFETs with Ultra Thin Gate Dielectrics	2001
90	具有電場感應汲極的蕭特基阻障多晶矽薄膜電晶體之研究	2001
91	新式金氧半場效電晶體之閘極與源/汲極工程研究	2001
92	具鰭狀通道之蕭特基源/汲極SOI場效電晶體之製作與分析	2001
93	蕭特基阻障多晶矽薄膜電晶體之研製	2000
94	軟性崩潰對深次微米 n 型通道金氧半電晶體特性	2000
95	具有電場感應汲極之薄膜電晶體的研製與分析	2000
96	Fabrication and Development of Schottky Source/Drain SOI MOSFET	2000
97	超薄氧化層崩潰特性之研究	1999
98	電漿製程對N通道金氧半場效應電晶體之損害效應	1999
99	超淺接面製程及鈦鈷堆疊結構形成矽化鈷之特性研究	1999
100	超薄閘極氧化層之製程相關可靠度研究	1999
101	多晶矽閘極滲雜濃度對以超薄氧化層製作的深次微米元件可靠度之研究	1998
102	利用超高真空化學氣相沉積術成長多晶矽與多晶矽鍺薄膜及其材料特性與元件應用之研究	1993

林鴻志 Lin, Horng-Chih

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