Browsing by Author "Chang, Hong-Ren"

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A simple Spacer technique to fabricate poly-Si TFTs with 50-nm nanowire channels
(2007-11-01)
Chang, Chia-Wen
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Deng, Chih-Kang
;
Chang, Hong-Ren
;
Chang, Che-Lun
;
Lei, Tan-Fu
In this letter, polycrystalline-silicon thin-film transistors (poly-Si TFTs) with 50-nm nanowire (NW) channels, which are fabricated without advanced photolithography by using a side-wall spacer-formation technique, are proposed for the first time. Because the polygate electrode is perpendicularly across poly-Si NW channels to form a trigatelike structure, the proposed poly-Si NW TFT owns outstanding gate controllability. In summary, a simple and low-cost scheme is proposed to fabricate high-performance poly-Si NW TFT suitable for future display manufacturing and practical applications.
CF4-plasma-induced fluorine passivation effects on poly-Si TFTs with high-kappa Pr2O3 gate dielectric
(2008)
Chang, Chia-Wen
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Huang, Po-Wei
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Deng, Chih-Kang
;
Huang, Jiun-Jia
;
Chang, Hong-Ren
High-performance polycrystalline silicon thin-film transistors (poly-Si TFTs) integrating high-kappa Pr2O3 gate dielectric and fluorine-passivated poly-Si film are demonstrated. High gate capacitance density and thin equivalent-oxide thickness provided by the high-kappa Pr2O3 gate dielectric have the advantage of increasing the driving current capability of the TFT device, but an undesirable off-state leakage current could be introduced from the high electric field near the drain side. Introducing fluorine atoms into poly-Si films by employing a low-temperature CF4 plasma treatment can effectively passivate the trap states. With 10 W CF4 plasma treatment on poly-Si film, the electrical characteristics of poly-Si Pr2O3 TFTs can be significantly improved, including a steeper subthreshold swing, smaller threshold voltage, higher field-effect mobility, and better on/off current ratio compared with that without CF4 plasma treatment. The maximum off-state leakage current of the fluorine-passivated TFT is more than one order of magnitude lower than that of the control TFT. Furthermore, the incorporation of fluorine atoms by CF4 plasma treatment also improves the reliability of poly-Si Pr2O3 TFTs against hot carrier stressing, which is due to the formation of stronger Si-F bonds in place of weak Si-H bonds in the poly-Si channel and at the Pr2O3 gate dielectric/poly-Si interface. Therefore, high-performance and high-reliability poly-Si TFTs with Pr2O3 gate dielectric and CF4 plasma treatment on poly-Si film are suitable for active-matrix liquid crystal display application. (c) 2007 The Electrochemical Society.
Characteristics of Pr2O3 gate dielectric thin-film transistors fabricated on fluorine-ion-implanted polysilicon films
(2007)
Chang, Chia-Wen
;
Deng, Chih-Kang
;
Huang, Jiun-Jia
;
Chang, Hong-Ren
;
Lei, Tan-Fu
A simple and effective scheme for fabricating high dielectric constant (high-kappa) praseodymium oxide (Pr2O3) gate dielectric thin-film transistors (Pr2O3 TFT) on fluorine-ion-implanted polysilicon films was proposed and demonstrated for the first time. Incorporating the fluorine-incorporation method with high-kappa Pr2O3 gate dielectric cannot only effectively passivate the trap states in the poly-Si film but also significantly increase the gate capacitance density. With the incorporation of fluorine ions, the electrical characteristics of Pr2O3 TFT can be remarkably improved, including smaller threshold voltage, steeper subthreshold swing, higher field-effect mobility, lower gate-induced drain leakage current, and better on/off current ratio. In addition, the incorporation of fluorine ions in the poly-Si film also improves the reliability of Pr2O3 TFT against hot-carrier stress, which is attributed to the formation of stronger Si-F bonds. Therefore, the proposed scheme is a promising technology for high-performance solid-phase crystallized poly-Si TFTs. (c) 2007 The Electrochemical Society. All rights reserved.
Characterizing fluorine-ion implant effects on poly-Si thin-film transistors with Pr2O3 gate dielectric
(2008-06-01)
Chang, Chia-Wen
;
Deng, Chih-Kang
;
Wu, Shih-Chieh
;
Huang, Jiun-Jia
;
Chang, Hong-Ren
The fluorine ion implantation applied to the polycrystalline silicon thin-film transistors (poly-Si TFTs) with high-k. Pr2O3 as gate dielectric is investigated for the first time. Using the Pr2O3 gate dielectric can obtain a high gate capacitance density and thin equivalent-oxide thickness, exhibiting a greatly enhancement in the driving capability of TFT device. Introducing fluorine ions into the poly-Si film by fluorine ion implantation technique can effectively passivate the trap states in the poly-Si film and at the Pr2O3/poly-Si interface to improve the device electrical properties. The Pr2O3 TFTs fabricated on fluorine-implanted poly-Si film exhibit significantly improved electrical performances, including lower threshold voltage, steeper subthreshold swing, higher field-effect mobility, lower off-state leakage current, and higher on/off current ratio, as compared with the control poly-Si Pr2O3 TFTs. Also, the incorporation of fluorine ions also improves the reliability of poly-Si Pr2O3 TFTs against hot-carrier stressing, which is attributed to the formation of stronger Si-F bonds. Furthermore, superior threshold-voltage rolloff characteristic is also demonstrated in the fluorine-implanted poly-Si Pr2O3 TFTs. Therefore, the proposed scheme is a promising technology for high-performance and high-reliability solid-phase crystallized poly-Si TFT.
Electrical properties of high-kappa praseodymium oxide polycrystalline silicon thin-film transistors with nitrogen implantation
(2008-02-01)
Deng, Chih-Kang
;
Chang, Hong-Ren
;
Chiou, Bi-Shiou
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電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
This paper demonstrates the polycrystalline silicon (poly-Si) thin-film transistors (TFTs) with high-kappa praseodymium oxide (Pr(2)O(3)) gate dielectric and nitrogen implantation to achieve high-performance characteristics for the first time. Nitrogen atoms with various dosages are implanted into amorphous silicon (alpha-Si) film to passivate the grain boundary trap states during solid-phase crystallization (SPC) annealing. From experimental results, the electrical characteristics of the Pr(2)O(3) poly-Si TFT implanted with the nitrogen dosage of 5 x 10(12) cm(-2) could be greatly improved. In addition, a better hot-harrier immunity of high-kappa Pr(2)O(3) poly-Si TFT could be also obtained.
Improvement of electrical characteristics for fluorine-ion implanted poly-Si TFTs using Pr2O3 gate dielectric
(2007)
Chang, Chia-Wen
;
Huang, Jiun-Jia
;
Chang, Hong-Ren
;
Lei, Tan-Fu
;
電子工程學系及電子研究所
High-performance fluorine-ion-implanted poly-Si thin-film transistors with high-k Pr2O3 gate dielectric are demonstrated for the first time. Experimental results have shown that the fluorine-doped poly-Si channel would effectively minimize the trap state densities, leading to improved electrical characteristics even without any hydrogenation process or advanced crystallization techniques. In addition, the presence of fluorine in poly-Si TFT obviously exhibits superior electrical reliability. This unique low cost, and effective fluorine ion implantation technique makes the Pr2O3 gate dielectric TFT very suitable for low power peripheral driving circuit applications.