Browsing by Author "Chen, KM"
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Item type:Item, A new method to extract MOSFET threshold voltage, effective channel length, and channel mobility using S-parameter measurement(2004-05-01) ;Chen, HY ;Chen, KM ;Huang, GW ;Chang, CYHuang, TYIn this work, a simple method for extracting MOSFET threshold voltage, effective channel length and channel mobility by using S-parameter measurement is presented. In the new method, the dependence between the channel conductivity and applied gate voltage of the MOSFET device is cleverly utilized to extract the threshold voltage, while biasing the drain node of the device at zero voltage during measurement. Moreover, the effective channel length and channel mobility can also be obtained with the same measurement. Furthermore, all the physical parameters can be extracted directly on the modeling devices without relying on specifically designed test devices. Most important of all, only one S-parameter measurement is required for each device under test (DUT), making the proposed extraction method promising for automatic measurement applications.Item type:Item, A novel approach for parameter determination of HBT small-signal equivalent circuit(2005-06-01) ;Chen, HY ;Chen, KM ;Huang, GW ;Chang, CY電子工程學系及電子研究所Direct parameter extraction is believed to be the most accurate method for equivalent-circuits modeling of heterojunction bipolar transistors (HBT's). Using this method, the parasitic elements, followed by the intrinsic elements, are determined analytically. Therefore, the quality of the extrinsic elements extraction plays an important role in the accuracy and robustness of the entire extraction algorithm. This study proposes a novel extraction method for the extrinsic elements, which have been proven to be strongly correlated with the intrinsic elements. By utilizing the specific correlation. the equivalent circuit modeling is reduced to an optimistation problem of determining six specific extrinsic elements. Converting the intrinsic equivalent circuit into its common-col lector configuration, all intrinsic circuit elements are extracted using exact closed-form equations for both the hybrid-pi and the T-topology equivalent circuits. Additionally, a general explicit equation on the total extrinsic elements is derived, subsequently reducing the number of optimization variables. The modeling results are presented, showing that the proposed method can yield a good fit between the measured and calculated S parameters.Item type:Item, A shield-based three-port de-embedding method for microwave on-wafer characterization of deep-submicrometer silicon MOSFETs(2005-09-01) ;Cho, MH ;Huang, GW ;Wu, LK ;Chiu, CSWang, YHA general three.-port S-parameter de-embedding method using shield-based test structures for microwave on-wafer characterization is presented in this paper. This method does not require any physical equivalent-circuit assumption for the surrounding parasitics of a device-under-test. We use one open and three thru dummy devices to remove the parasitic components connected to the gate, drain, and source terminals of a MOSFET. By shielding the lossy silicon substrate, the cross-coupling from port to port can be significantly mitigated, and thus, the parasitics of probe pads and interconnects at each port can be separately subtracted. The MOS transistor and its corresponding dummy structures fabricated in a 0.18-mu m CMOS process were characterized up to 20 GHz. Compared with the two-port cascade-based de-embedding method, the proposed three-port de-embedding procedure can further eliminate the parasitics associated with the dangling leg in the source terminal. The impacts of the accuracy of the de-embedding technique on device modeling and simulation are also discussed.Item type:Item, A study of boron diffusion from selectively grown epitaxial silicon-germanium into silicon during rapid thermal annealing(2002) ;Yang, TH ;Chang, EY ;Chen, KM ;Chien, CHHuang, HJBoron diffusion from selectively grown epitaxial Si1-xGex into Si during rapid thermal annealing (RTA) was investigated. Selective epitaxial growth (SEG) of in-situ boron-doped strained Si1-xGex epitaxial layers with different Ge percentages were selectively grown by ultra high vacuum chemical molecular epitaxy (UHVCME). The results show that the boron diffusion depth from SEG Si1-xGex into n-type Si depends on boron concentration, Ge profile in the SEG area, and the size of the SEG area. Higher boron concentrations in SEG Si1-xGex film increases the boron diffusion depth. However, the diffusion depth can be reduced by increasing Ge composition in SEG Si1-xGex. It was also found that the samples with graded Ge profiles have higher diffusion depths than those with uniform profiles. In addition, the boron diffusion depth increases with the size of the SEG Si1-xGex area. The strain in SEG Si1-xGex, the chemical potential of Ge in SEG Si1-xGex and the dislocations induced in the SEG Si1-xGex layers are the main reasons for the phenomena observed.Item type:Item, An improved approach for small-signal equivalent-circuit parameter determination of InGaP/GaAs HBT(2005-03-05) ;Chen, HY ;Chen, KM ;Huang, GW ;Chang, CYHuang, TYIn this paper, an improved method for extracting the small-signal equivalent-circuit elements of an HBT is proposed. A more general HBT equivalent circuit and a more general explicit equation on the total extrinsic elements are introduced. Linear least-square algorithms are cleverly adopted to reduce the number of error function. As a result, the modified approach can yield a better fit between the measured and simulated S-parameters over the conventional method. (C) 2005 Wiley Periodicals, Inc.Item type:Item, An improved parameter-extraction method of SiGe HBTs' substrate network(2006-06-01) ;Chen, HY ;Chen, KM ;Huang, GW ;Chang, CY電子工程學系及電子研究所In this letter, an improved method for substrate network parameter extraction of SiGe heterojunction bipolar transistors (HBTs) is proposed. It is found that, without taking the intrinsic circuit elements into consideration, the conductance of substrate network will be underestimated while the susceptance of substrate network will be overestimated. Therefore, an iteration procedure is developed,to determine the intrinsic circuit elements of SiGe HBTs first. The intrinsic circuit elements are then applied to remove their influence on the substrate network parameter extraction. Compared with the conventional method, the proposed one can avoid some unphysical modeling results and provide reliable substrate network parameters.Item type:Item, Analysis of low-frequency noise in boron-doped polycrystalline silicon-germanium resistors(2002-09-30) ;Chen, KM ;Huang, GW ;Chiu, DY ;Huang, HJChang, CYLow-frequency noise in boron-doped polycrystalline silicon-germanium (poly-Si1-xGex) resistors at various temperatures is studied. The poly-Si1-xGex films with 0%similar to36% Ge content were grown using ultrahigh vacuum chemical molecular epitaxy system. We find that the low-frequency noise in poly-Si1-xGex decreases with increasing Ge content, due to the lower potential barrier height of grain boundaries in higher Ge content samples. Moreover, the low-frequency noise decreases with increasing temperature. These results are well explained by the carrier mobility fluctuation model. (C) 2002 American Institute of Physics.Item type:Item, Characterization and modeling of RF MOSFETs under hot carrier stress and oxide breakdown(2006) ;Huang, SY ;Chen, KM ;Huang, GW ;Yang, DYChang, CYEffects of hot carrier stress (HCS) and oxide breakdown (OBD) on the main figures-of-merit of RF MOSFETs are examined in this paper. We found that under the same dc degradation, the cut-off frequency (f(Tau)) and maximum oscillation frequency (f(max)) suffered mode seriously by OBD than by HCS. Minimum noise figure (NFmin) is one of the main concerns in RF characteristics. NFmin increased dramatically after OBD than that after HCS due to the added gate leakage paths. Those effects can be clarified and explained by using a constructed explained small-signal model.Item type:Item, Computation of noise parameters using genetic algorithms(2004) ;Chen, HY ;Chen, KM ;Huang, GW ;Cho, MHChang, CYIn this study, an improved computation method for the noise parameters of a linear noisy two-port network is introduced. A new error function, which considers noise figure and source admittance error simultaneously, is proposed to estimate the four noise parameters. The global optimization of the error function is searched directly by using a genetic algorithm.Item type:Item, Degradation of low-frequency noise in partially depleted silicon-on-insulator metal oxide semiconductor field-effect transistors by hot-carrier stress(2005-06-01) ;Chen, KM ;Hu, HH ;Huang, GW ;Chang, CY電子工程學系及電子研究所In this study, we determined the effects of hot-carrier stress on the low-frequency noise characteristics of partially depleted metal-oxide-semi conductor field-effect transistors (MOSFETs) in silicon-on-insulator (SOI) technology. In devices with a floating-body configuration, kink-related excess noise was observed due to the floating-body effect. The level of this excess noise decreased after normal-mode stress, while it was masked by 1/f noise after reverse-mode stress. The effects of stress-generated interface traps on the drain-to-body leakage current and the floating-body effect were also determined and used to explain the noise behavior. Moreover, the stress-induced 1/f noise degradation in floating-body devices and body-contact devices was studied. It was found that the 1/f degradation of body-contact devices is more significant than that of floating-body devices after hot-carrier stress.Item type:Item, Deposition of polycrystalline Si and SiGe by ultra-high vacuum chemical molecular epitaxy(2000-07-01) ;Chen, KM ;Huang, HJ ;Chang, CY ;Chen, LPHuang, GWThe polycrystalline Si1-xGex (poly-Si1-xGex) films have better properties than poly-Si for device fabrications, such as lower proceeding temperature and process thermal budget. For these reasons, the poly-Si1-xGex films have been utilized for low-temperature thin film transistor fabrications and gate electrodes of metal-oxide-semiconductor transistors. In this work, disilane and germane were used to grow poly-Si1-xGex films at low temperature (<600 degrees C) by the cold-wall type ultrahigh vacuum chemical molecular epitaxy system. The poly-Si1-xGex films were deposited on oxide and nitride surfaces. The Ge fraction x was evaluated from x-ray diffraction and Auger electron spectroscopy. It is observed that the Ge fraction increases with the increase of the GeH4 flow rate. The result is only slightly related to the substrate type. The growth rate increases with the Ge fraction at lower values and then decreases with the Ge fraction in the higher composition range. This implies that the growth mechanism of poly-Si1-xGex films is different from that of epitaxial Si1-xGex on Si. The uniformity of poly-Si1-xGex films depends on the Ge fraction, and it is improved-by the addition of germanium. The result can be explained by the lower activation energy (<0.25 eV) of poly-Si(1-x)G(x), deposition as compared to that of poly-Si (similar to 2.1 eV). From the x-ray diffraction and atomic force microscopy analyses, the crystallinity and surface roughness of films are suitable for device fabrications. (C) 2000 American Vacuum Society. [S0734-2101(00)07704-6].Item type:Item, Electrical and compositional properties of co-silicided shallow p(+)-n junction using Si-capped/boron-doped Si1-xGex layer deposited by UHVCME(2001-03-01) ;Huang, HJ ;Chen, KM ;Chang, CY ;Huang, TY電子工程學系及電子研究所Co-silicided, strained boron-doped Si1-xGex p(+)/n junction with different Ge mole fractions deposited by ultrahigh vacuum chemical molecular epitaxy (UHVCME), suitable for raised source/drain metal oxide semiconductor field effect transistor applications, is studied. The electrical and compositional characteristics are presented. By using a Co/Si-cap/graded Si1-xGex structure, optimum forward and reverse diode characteristics with a near perfect forward ideality factor (i.e., <1.01) can be obtained for the p(+)-n junction. Thr low area leakage current extracted from Si-capped samples confirms that serious lattice misfit problems during silicidation, typical of Co/pure Si1-xGex samples, is largely eliminated by Si capping. In addition, the specific contact resistance is found to decrease as Ge mole fraction increases, and would be even lower if Si capping is used for silicidation. Finally, the composition of Co/Si1-xGex and Co/Si-cap/Si1-xGex interfacial reaction is studied by high-resolution X-ray spectra. Our results show that even after a second anneal at 850C, very little lattice distortion is discovered. Five harmonic peaks still remain even after a second anneal at 850 degreesC. Transmission electron micrograph also exhibits good uniformity and interface quality. (C) 2001 The Electrochemical Society. All rights reserved.Item type:Item, Electrical properties of shallow p(+)-n junction using boron-doped Si1-xGex layer deposited by ultrahigh vacuum chemical molecular epitaxy(2001-05-01) ;Huang, HJ ;Chen, KM ;Chang, CY ;Chao, TSHuang, TYStrained boron-doped Si1-xGex layers with different Ge mole fractions were selectively deposited by ultrahigh vacuum chemical molecular epitaxy to form shallow p(+)-n junction suitable for raised source/drain metal-oxide-semiconductor field effect transistor applications. Detailed electrical characterizations were performed. Our results show that the reverse leakage current could be optimized by a rapid thermal annealing at 950 degreesC for 20 s, and a near perfect forward ideality factor (i.e., <1.01) is obtained for the p(+)-n Si1-xGex/Si junction. By analyzing the periphery and area leakage current components of p(+)-n Si1-xGex/Si junctions with various perimeter lengths and areas, the degree of misfit dislocations and undercut effect were studied. The specific contact resistance was found to decrease as Ge mole fraction increases. Junction depth measurements also show that the junction depth decreases monotonically with increasing Ge mole fraction. The reduced B diffusion constant is attributed to the increasing Ge gradient in the transition region. (C) 2001 American Institute of Physics.Item type:Item, Extraction of substrate parameters for RF MOSFETs based on four-port measurement(2005-06-01) ;Wu, SD ;Huang, GW ;Chen, KM ;Chang, CYTseng, HCIn this work, a new method for extracting substrate parameters of radio frequency (RF) metal oxide semiconductor field effect transistors (MOSFETs) based on four-port measurement is presented. A T-liked substrate resistance network is used and the values of all components in the cold MOSFETs were extracted directly from the four-port data between 250 MHz and 8.5 GHz. The output admittance Y-22 can be well modeled up to 26.5 GHZ based on the extracted substrate resistances and the other extrinsic capacitances extracted from an active device.Item type:Item, Hot-carrier effects on power characteristics of SiGeHBTs(2004-06-01) ;Huang, SY ;Chen, KM ;Huang, GW ;Tseng, HCHsu, TLThis letter investigates hot-carrier (HQ effects on the power characteristics of Si-SiGe HBTs using load-pull measurements. We found that the output power, power gain, and linearity of Si-SiGe HBTs are degraded after HC stress. Under constant base-current measurement, the HC-induced power performance degradation is found to be much worse than that under constant collector-current measurement. The HC effects on the cutoff frequency, nonlinearity terms of base-current and collector-current, and third-order intermodulation (IM3) cancellation effect have been analyzed to explain the experimental observations.Item type:Item, Hot-carrier induced degradations on RF power characteristics of SiGe heterojunction bipolar transistors(2004) ;Huang, SY ;Chen, KM ;Huang, GW ;Hsu, TLTseng, HCHot-carrier (HC) effects on high-frequency and RF power characteristics of Si/SiGe HBTs were investigated in this paper. We found that the small-signal current gain, output power, and power gain of Si/SiGe HBTs are suffered by the HC stress. With different bias conditions, the degradations of cutoff frequency and output power were found to be worse under constant base-current measurement than that under constant collector-current measurement. These phenomena have been explained by the change of the current gain, transconductance, and base-emitter resistance under stress.Item type:Item, Hot-carrier induced degradations on RF power characteristics of SiGe heterojunction bipolar transistors(2005-06-01) ;Huang, SY ;Chen, KM ;Huang, GW ;Liang, VTseng, HCHot-carrier (HC) effects on high-frequency and RF power characteristics of Si/SiGe HBTs are investigated in this paper. By using the two-tone load-pull measurement, we find that not only the cutoff frequency, but also the output power performances of Si/SiGe HBTs are suffered by the HC stress. In this work, S-parameters and intrinsic elements of an equivalent hybrid-pi model were used to validate the HC effects on high-frequency characteristics. With different bias conditions, the degradations of cutoff frequency, power gain, and linearity are found to be worse under constant base-current measurement than that under constant collector-current measurement. The HC-induced degradations on the current gain, transconductance, and ideality-factor of base and collector currents are analyzed to explain the experimental observations.Item type:Item, Impact of hot carrier stress on RF power characteristics of MOSFETs(2005) ;Huang, SY ;Chen, KM ;Huang, GW ;Yang, DYChang, CYThis paper investigates hot-carrier (HQ effects on the RF power and linearity characteristics of MOS transistors using load-pull measurement. We found that the RF power characteristics are affected by the HC stress, and the linearity of MOS transistors is clearly degraded after HC stress at constant gate voltage measurement. However, at high gate voltage bias, the HC-induced power degradation is much reduced compared with that under low gate voltage regimes. In addition, HC effects on linearity can be softened by biasing the transistor at constant drain currents. These experimental observations can be explained by the change of threshold voltage, transconductance, subthreshold swing, and mobility degradation coefficient under HC stress.Item type:Item, Improved electrical properties of shallow p(+)-n junction using selectively grown graded Si1-xGex epitaxial structure(2000-12-01) ;Huang, HJ ;Chen, KM ;Chang, CY ;Huang, TYChen, LPA strained boron-doped graded Si1-xGex structure consisting of layered Si1-xGex with increasing Ge mole fractions was studied as the solid diffusion source for forming a p(+)-n junction suitable for raised source/drain metal oxide semiconductor field effect transistor (MOSFET) application. The in situ doped graded Si1-xGex structure was selectively epitaxially grown (SEG) on the active region using ultrahigh vacuum chemical molecular epitaxy (UHVCME). Improved electrical characteristics, not possible with conventional uniform SEG Si1-xGex junction, are achieved with the graded SEG Si1-xGex junction. For the conventional uniform Si1-xGex junction, while a high Ge composition is necessary for reducing the specific contact resistance and the sheet resistance, such a high Ge composition, also results in a degraded ideality factor and a leaky junction. In contrast, a near-perfect SiGe/Si interface property is demonstrated with the graded Si1-xGex structure. Optimum specific contact resistance and the sheet resistance can be obtained by the graded Si1-xGex structure without suffering degraded junction leakage and ideality factor. These results indicate that the degree of misfit dislocation and the undesirable undercut effects could be effectively reduced by using the graded structure with its lower Ge composition close to the silicon substrate, while a low sheet resistance and specific contact resistance is preserved with its higher Ge composition at the top of the layered structure. (C) 2000 The Electrochemical Society. S1099-0062(00)08-111-6. All rights reserved.Item type:Item, Improved low temperature characteristics of p-channel MOSFETs with Si1-xGex raised source and drain(2001-08-01) ;Huang, HJ ;Chen, KM ;Huang, TY ;Chao, TSHuang, GWP-channel metal-oxide-semiconductor field-effect transistors with Si1-xGex raised source and drain (RSD) have been fabricated and further studied for low temperature applications. The Si1-xGex RSD layer was selectively grown by ANELVA. SRE-612 ultra-high vacuum chemical vapor deposition (UHVCVD) system, Compared to devices with conventional Si RSD, improved transconductance and specific contact resistance were obtained, and these improvements become even more dramatic with reducing channel length, Well-behaved short channel characteristics with reduced drain-induced barrier lowering (DIBL) and off-state leakage current are demonstrated on devices with 100 nm Si1-xGex RSD, due to the resultant shallow junction and less implantation damage. Moreover, temperature measurements reveal that Si1-xGex RSD devices show more dramatic improvement in device performance at low temperature (-50 degreesC) operation, which can be ascribed to the higher temperature sensitivity of the Si1-xGex sheet resistance.