Browsing by Author "Liao, C. C."

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Calibration 90 nm node RF mosfets, including stress degradation
(2007-03-01)
Kao, H. L.
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Kao, C. H.
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Chin, A.
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Liao, C. C.
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電子工程學系及電子研究所
Using a microstrip line layout, a low minimum noise figure (NFmin) of 0.51 dB, at 10 GHZ, was directly measured for 90 nm node NMOSFETs (65 nm physical gate length). The NFmin was located at the peak f(T) of 152 GHz, coinciding with the peak transconductance (g). On the basis of these measurements, a self-consistent model of the DC I-V, S-parameters, and NFmin results was developed, including the changes after hot-carrier stress. (c) 2007 Wiley Periodicals, Inc.
DC-RF performance improvement for strained 0.13 mu m MOSFETs mounted on a flexible plastic substrate
(2006)
Kao, H. L.
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Chin, Albert
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Liao, C. C.
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Tseng, Y. Y.
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McAlister, S. P.
By applying 0.7% tensile strain to the flexible die of a 0.13 mu m thin-body (40 mu m) Si MOSFET mounted on plastic, both the DC and RF performance have been improved. The current I(d,sat) was 14.3% higher, and f(T) increased from 103 to 118 GHz with NF(min) decreasing from 0.89 to 0.75 dB at 10 GHz. These improvements are comparable with those for SiN-capped 90 nm strained-Si nMOS and consistent with device simulations. The approach has the advantages of better RF passive devices on the insulating plastic substrate and low cost.
Flat band voltage control on low V(t) metal-gate/high-kappa CMOSFETs with small EOT
(2009-07-01)
Chin, Albert
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Chang, M. F.
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Lin, S. H.
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Chen, W. B.
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Lee, P. T.
The unwanted high threshold voltage (V(t)) is the major challenge for metal-gate/high-kappa CMOs especially at small equivalent-oxide-thickness (EOT). We have investigated the high V(t) issue that is due to flat-band voltage (V(fb)) roll-off at smaller EOT. A mechanism of charged oxygen vacancies formed by interface reaction was proposed to explain the V(fb) roll-off effect. This interface reaction can be decreased by inserting a thin interfacial SiON and using novel low temperature process. The self-aligned and gate-first metal-gate/high-kappa CMCSFETs using these methods have achieved low V(t) and good control of V(fb) roll-off at small 0.6-1.2 nm EOT. Crown Copyright (C) 2009 Published by Elsevier B.V. All rights reserved,
Flat band voltage control on low V-t metal-gate/high-kappa CMOSFETs with small EOT
(2009-07-01)
Chin, Albert
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Chang, M. F.
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Lin, S. H.
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Chen, W. B.
;
Lee, P. T.
The unwanted high threshold voltage (V-t) is the major challenge for metal-gate/high-kappa CMOs especially at small equivalent-oxide-thickness (EOT). We have investigated the high V-t issue that is due to flat-band voltage (V-fb) roll-off at smaller EOT. A mechanism of charged oxygen vacancies formed by interface reaction was proposed to explain the V-fb roll-off effect. This interface reaction can be decreased by inserting a thin interfacial SiON and using novel low temperature process. The self-aligned and gate-first metal-gate/high-kappa CMCSFETs using these methods have achieved low V-t and good control of V-fb roll-off at small 0.6-1.2 nm EOT. Crown Copyright (C) 2009 Published by Elsevier B.V. All rights reserved,
Improvement of the performance of strained 0.13 mu m MOSFETs mounted on flexible plastic substrates
(2007)
Kao, H. L.
;
Liao, C. C.
;
McAlister, S. P.
;
Chin, Albert
;
電子工程學系及電子研究所
Low V-t gate-first Al/TaN/[Ir3Si-HfSi2-x]/HfLaON CMOS using simple laser annealing/reflection
(2008)
Liao, C. C.
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Chin, Albert
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Su, N. C.
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Li, M. -F.
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Wang, S. J.
We report low V-t Al/TaN/[Ir3Si-HfSi2-x]/HfLaON CMOS using simple laser annealing/reflection with self-aligned and gate-first process compatible with current VLSI. At 1.05 nm EOT, good phi(ro-eff) of 5.04 and 4.24 eV, low V-t of -0.16 and 0.13 V, high mobility of 85 and 209 cm(2)/Vs, and small 85 degrees C BTI <= 40 mV (10 MV/cm, 1 hr) are measured for p- and n-MOS.
Low V-t gate-first Al/TaN/[Ir3Si-HfSi2-x]/HfLaON CMOS using simple laser annealing/reflection
(2008-01-01)
Liao, C. C.
;
Chin, Albert
;
Su, N. C.
;
Li, M. -F.
;
Wang, S. J.
We report low V-t Al/TaN/[Ir3Si-HfSi2-x]/HfLaON CMOS using simple laser annealing/reflection with self-aligned and gate-first process compatible with current VLSI. At 1.05 nm EOT, good phi(m-eff) of 5.04 and 4.24 eV, low V-t of -0.16 and 0.13 V, high mobility of 85 and 209 cm(2)/Vs, and small 85 degrees C BTI <= 40 mV (10 MV/cm, 1 hr) are measured for p- and n-MOS.
Metal-Gate/High-kappa/Ge nMOS at Small CET With Higher Mobility Than SiO2/Si at Wide Range Carrier Densities
(2013-02-01)
Liao, C. C.
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Ku, T. C.
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Lin, M. H.
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Zeng, Lang
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Kang, Jinfeng
High-performance TaN/TiLaO/La2O3/SiO2/(111)-Ge nMOSFETs show high mobility of 432 cm(2)/V . s at 10(13) cm(-2) carrier density (N-s), good 1.05 junction ideality factor, and small subthreshold swing of 101 mV/dec, at a small 1.1-nm capacitance-equivalent thickness (CET). This is the first report of higher mobility in the Ge nMOSFET than SiO2/Si universal mobility at wide medium-high N-s range and small CET of 1.1 nm, which is attributed to using the (111)-Ge substrate, 30-ns laser annealing, SiO2 interfacial layer, and YbGex/n-Ge contact.
Strain enhanced DC-RF performance of 0.13 mu m nMOSFETs on flexible plastic substrate
(2006-07-06)
Chin, A.
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Kao, H. L.
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Kao, C. H.
;
Liao, C. C.
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Tseng, Y. Y.
A 14.3% saturation current I-d,(sat) improvement and 0.75 dB minimum noise figure (NFmin) at 10 GHz were measured by applying similar to 0.7% tensile strain for 16 finger, 0.13 mu m RF MOSFETs with thin-body (40 mu m) substrate mounted on plastic. These excellent results for mechanical-strain on DC-RF MOSFETs are better than those of SiN-capped 90 nm strained-Si nMOSFETs and consistent with device simulations.
Very low noise in 90nm node RF MOSFETs using a new layout
(2007-01-01)
Kao, H. L.
;
Chin, Albert
;
Liao, C. C.
;
McAlister, S. P.
;
電子工程學系及電子研究所
We have directly measured a record low minimum noise figure (NFmin) of 0.46 dB at 10 GM, along with a high 16.6 dB Associated Gain, in an 8-finger 90 nm node MOSFET (L-G = 65nm) without de-embedding. At 18 GHz, NFmin was 0.83 dB with 13.5 dB gain. This was achieved using a microstrip line layout to screen the RF noise generated by the lossy substrate.