Browsing by Author "Liu, Chien"

Now showing 1 - 20 of 22

Achieving High-Scalability Negative Capacitance FETs with Uniform Sub-35 mV/dec Switch Using Dopant-Free Hafnium Oxide and Gate Strain
(2018-01-01)
Fan, Chia-Chi
;
Cheng, Chun-Hu
;
Tu, Chun-Yuan
;
Liu, Chien
;
Chen, Wan-Hsin
For the first time, we successfully demonstrated that the 4-nm-thick dopant-free HfO2 NCFETs using gate strain can implement an energy-efficient switch of a low gate overdrive voltage and a nearly hysteresis-free sub-40 mV/dec swing. The gate strain favorably rearranges oxygen vacancies and boosts orthorhombic phase transition. Furthermore, the dopant-free HfO2 NCFET can be further improved by in-situ nitridation process. The 4-nm-thick nitrided HfO2 NCFETs achieve a steep symmetric sub-35 mV/dec switch, a sustained sub-40 mV/dec SS distribution, and excellent stress immunity during NC switch. The high-scalability and dopant-free NCFET shows the great potential for the application of future highly-scaled 3D CMOS technology.
Characteristic Simulation of Hybrid Multilayer Junctionless Field Effect Transistors with Negative Capacitance Effect
(2020-01-01)
Ma, Jun
;
Liu, Chien
;
Liu, Wei-Dong
;
Hung, Yu-Wen
;
Fan, Yu-Chi
In this study, we reported a hybrid multi-PNPN channel junctionless field effect transistor (JLFET) with negative capacitance (NC) effect by simulation. By incorporating a ferroelectric HfAlO capacitor with NC effect, an extremely low subthreshold swing of 34 mVdecade, a very high onoff current ratio and a very low driven voltage were achieved in the NC-enhanced hybrid multi-PNPN channel JLFET. This novel device not only improves the on-state current reduction while channel scaling down, but also shows great potential for the next-generation low-power three-dimensional stacked integrated circuit applications.
Energy-Efficient HfAlOx NCFET: Using Gate Strain and Defect Passivation to Realize Nearly Hysteresis-Free Sub-25mV/dec Switch with Ultralow Leakage
(2017-01-01)
Fan, Chia-Chi
;
Cheng, Chun-Hu
;
Chen, Yi-Ru
;
Liu, Chien
;
Chang, Chun-Yen
We experimentally demonstrated that ferroelectric HfAlOx negative capacitance FETs using gate strain and defect passivation can realize a nearly hysteresis-free forward/reverse swing of < 25 mV/dec for symmetric switch, a wide sub-60 mV/dec SS range over 4 decade of I-DS to reach an ultralow I-off of 4 fA/mu m, and a very high I-on/I-off ratio of > 10(8). Under the influence of gate strain and negative capacitance, the NCFETs exhibits 66% I-on enhancement and 27% V-T reduction. In addition, the fluorine defect passivation reduces oxygen vacancies of gate stack to further mitigate interface depolarization field and help to significantly reinforce surface potential amplification effect during NC operation.
Ferroelectric Characterization of Hafnium-Oxide-Based Ferroelectric Memories with Remote Nitrogen Plasma Treatments
(2019-01-01)
Lee, You-Ting
;
Chen, Hsuan-Han
;
Tung, Yi-Chun
;
Shih, Bing-Yang
;
Hsiung, Szu-Yen
In this paper, we experimentally demonstrated the advantage of remote nitrogen plasma on improving interface quality of HfO2-based ferroelectric devices. The remote nitrogen plasma not only reduces leakage current of gate stack to appropriately sustain the ferroelectricity during ferroelectric domain switching, but also effectively improve the ferroelectric fatigue to enhance endurance cycling performance.
Gamma-Ray Irradiation Effect on Ferroelectric Devices with Hafnium Aluminum Oxides
(2019-12-01)
Liu, Chien
;
Tung, Yi-Chun
;
Wu, Tian-Li
;
Cheng, Chun-Hu
;
Tseng, Chih-Yang
Herein, the gamma-ray irradiation effect on ferroelectric HfAlO(x)capacitors for biomedical and space applications is investigated. The experimental results focus on the observation of ferroelectric polarization characteristics in support of different defect mechanisms induced by annealing, endurance cycling, and gamma-ray irradiation. It is found that the HfAlO(x)with low Al doping of 6.5% become more vulnerable to radiation exposure, but a remarkable improvement in 9%-Al-doped HfAlO(x)due to less oxygen vacancies is demonstrated. In addition, the results also confirm that the fatigue property of ferroelectric HfAlO(x)capacitor is determined by the electric-stress-induced defect during endurance cycling, not mainly contributed by irradiation damage, which shows the potential for memory applications in rigorous irradiation environment.
High performance negative capacitance field-effect transistor featuring low off-state current, high on/off current ratio, and steep sub-60 mV dec(-1) swing
(2020-04-01)
Liu, Chien
;
Chen, Hsuan-Han
;
Tung, Yi-Chun
;
Wang, Wei-Chun
;
Huang, Zhong-Ying
In this work, we demonstrated that the 5-nm-thick HfAlOx negative capacitance transistor (NCFET) with optimized Al doping can achieve a minimum 33 mV dec(-1) subthreshold swing (SS), an ultralow l(off) of 7.44 fA mu m(-1), and a high l(on)//l(off) ratio of 1.9 x 10(8). The NC switching with sub-60 mV dec(-1) SS can be implemented from V-DS - 0.2 V to 0.8 V due to an ultralow off-state leakage current. The experimental results reveal that well-controlled Al doping in HfAlOx not only reduces off-state leakage of the transistor, but also improves the ferroelectric NC effect to achieve a sub-60 mV dec-1 switching under a favorably low sub-1 voltage. This scaled HfAlOx NCFET with optimized Al doping and fluorine defect passivation shows the great potential for the application of low power logic devices. (C) 2020 The Japan Society of Applied Physics
High Speed Negative Capacitance Ferroelectric Memory
(2017-01-01)
Chang, Chun-Yen
;
Fan, Chia-Chi
;
Liu, Chien
;
Chiu, Yu-Chien
;
Cheng, Chun-Hu
This work experimentally demonstrated a one-transistor ferroelectric versatile memory with the multi-technique integration of negative-capacitance mechanism, ferroelectric polarization effect and metal-strained engineering. The negative-capacitance versatile memory featured a steep sub-60mV/dec subthreshold swing, fast 20-ns switching speed and long 1012 cycled endurance. We successfully demonstrated that the metal-gate-induced strain could help to improve ferroelectric phase transformation. The excellent endurance characteristics could be ascribed to efficient ferroelectric negative-capacitance switching under low program/erase voltages.
Impact of Ferroelectric Domain Switching in Nonvolatile Charge-Trapping Memory
(2017-01-01)
Fan, Chia-Chi
;
Chiu, Yu-Chien
;
Liu, Chien
;
Liou, Guan-Lin
;
Lai, Wen-Wei
In this work, we proposal a ferroelectric domain to enhance program/erase/read efficiency of conventional charge-trapping nonvolatile memory. The ferroelectric-domain-dominated HfZrO/HfON memory shows the better subthreshold characteristics than control charge-trapping structure (HfO2/HfON). Additionally, the memory speed with ferroelectric polarization (similar to 800ns) is more than three orders of magnitude faster than that of control trapping type.
Impact of Zirconium Doping on Steep Subthreshold Switching of Negative Capacitance Hafnium Oxide Based Transistors
(2019-05-01)
Cheng, Chun-Hu
;
Lin, Ming-Huei
;
Chen, Hsin-Yu
;
Fan, Chia-Chi
;
Liu, Chien
In this work, it is demonstrated that the negative capacitance effect of ferroelectric Hf1-xZrxO2 transistor is highly correlated with Zr doping concentration. A steep subthreshold swing of 40mV/decade, a low off-state leakage current of 190fAm(-1), and a large on/off current ratio of >10(7) can be simultaneously achieved in optimized negative capacitance Hf1-xZrxO2 transistor. Besides, the Zr diffusion issue and non-ferroelectric phases significantly affect the multi-domain switching of polycrystalline Hf1-xZrxO2. Therefore, an appropriate amount of Zr substitution is more favorable for both boosting ferroelectric and implementing the negative capacitance switch.
Improved Electrical Characteristics and Reliability of Multi-Stacking PNPN Junctionless Transistors Using Channel Depletion Effect
(2017-01-01)
Lin, Ming-Huei
;
Shih, Yi-Jia
;
Liu, Chien
;
Chiu, Yu-Chien
;
Fan, Chia-Chi
This work demonstrates a novel multi-stacking PNPN channel structure for nanowire junctionless transistor. With the multi-PNPN channel structure, the design of multi-stacking PNPN junctions can promote the p-type channel layer to achieve fully depleted channel, accompanied with the excellent electrical performances on a steep subthreshold swing of 77 mV/dec and a high on/off current ratio of >10(7). Besides, utilizing with the constant-voltage-stress measurement, the multi-PNPN channel junctionless FETs with a robust stress reliability was demonstrated.
Improved Thermal Stability and Stress Immunity in Highly Scalable Junctionless FETs Using Enhanced-Depletion Channels
(2018-12-05)
Liu, Chien
;
Cheng, Chun-Hu
;
Lin, Ming-Huei
;
Shih, Yi-Jia
;
Hung, Yu-Wen
In this work, we report a novel multi-PNPN-channel junctionless transistor with short channel length of 60nm. The multi-PNPN junctionless transistor exhibits the larger drive current of > 1 mu A/mu m, the steeper turn-on switching of 77 mV/decade, and the higher on/off current ratio of > 10(7) than the hybrid PN channel device under the same gate overdrive. The improved performance is mainly attributed to the enhanced depletion effect of multi-PNPN channel to optimize the electric field modification of surface p-channel. The stronger immunity to constant-voltage stress is also obtained for multi-PNPN channel due to the lower lateral electric field near drain side to reduce the impact ionization ratio. (C) 2018 The Electrochemical Society.
Interface Engineering of Ferroelectric Negative Capacitance FET for Hysteresis-Free Switch and Reliability Improvement
(2018-01-01)
Fan, Chia-Chi
;
Tu, Chun-Yuan
;
Lin, Ming-Huei
;
Chang, Chun-Yen
;
Cheng, Chun-Hu
In this work, we successfully achieve a hysteresis-free negative capacitance field effect transistors (NCFETs) by exploiting a defect passivation scheme. This research work simultaneously provides a new insight into the gate-oxide stress reliability of NCFET. The fluorine-passivated HfAlOx NCFET shows the excellent transistor characteristics including a steep subthreshold swing of sub-30-mV/dec, a negligible hysteresis-free switch of similar to 10mV and a large on/off current reatio (I-on/I-off) of >10(7). Most importantly, fluorine passivation for NC HfAlOx effectively suppress the generation of shallow traps during electrical stress test. Besides, it is favorable to maintain NC operation and SILC immunity by in-situ fluorine passivation, which has been verified by transient pulse I-V measurement.
Interface Polarization Fluctuation Effect of Ferroelectric Hafnium-Zirconium-Oxide Ferroelectric Memory with Nearly Ideal Subthreshold Slope
(2015)
Chiu, Yu-Chien
;
Cheng, Chun-Hu
;
Fan, Chia-Chi
;
Chen, Po-Chun
;
Chang, Chun-Yen
Investigation of Gate-Stress Engineering in Negative Capacitance FETs Using Ferroelectric Hafnium Aluminum Oxides
(2019-02-01)
Cheng, Chun-Hu
;
Fan, Chia-Chi
;
Liu, Chien
;
Hsu, Hsiao-Hsuan
;
Chen, Hsuan-Han
In this paper, we reported a ferroelectric HfAlOx negative capacitor transistor with gate-stress (GS) engineering. Compared to control device, the HfAlOx transistor with GS engineering percentage of I-ON enhancement and 27% V-T reduction under the assistance of the negative capacitance (NC) effect. The orthorhombic phase transition played a crucial role in realizing the NC effect. From the results of the material analysis, the theoretical Landau simulation and electrical measurement, we demonstrated that the GS is favorable for inducing orthorhombic phase crystallization of HfAlOx and stabilizing the NC effect, which shows the potential for the application of advanced technology node.
Investigation of Polarization Hysteresis and Transient Current Switching in Ferroelectric Aluminum-Doped Hafnium Oxides
(2018-01-01)
Liu, Chien
;
Fan, Chia-Chi
;
Tseng, Chih-Yang
;
Hsu, Hsiao-Hsuan
;
Cheng, Chun-Hu
In this work, we investigated ferroelectric and antiferroelectric effects in ferroelectric HfAIO capacitor with various aluminum doping concentrations. With the increase of aluminum doping concentration, the transition from ferroelectric to weak anti-ferroelectric properties can be observed by measuring polarization hysteresis and transient current response. The experimental results prove that the aluminum doping concentration of HfAIO material not only affects the ferroelectric-antiferroelectric transition, but also determine the leakage issue during domain switching.
Investigation on polarization characteristics of ferroelectric memories with thermally stable hafnium aluminum oxides
(2019-08-01)
Chang, Tun-Jen
;
Liu, Chien
;
Fan, Chia-Chi
;
Hsu, Hsiao-Hsuan
;
Chen, Hsuan-Han
In this work, we successfully demonstrated the 9.6-nm-thick HfAlOx ferroelectric memory using light aluminium doping of 6.5% to form ferroelectric orthorhombic phase. Compared to ferroelectric HfZrOx film with zirconium diffusion issue, the HfAlOx film showed excellent thermal stability under high temperature annealing. Besides, the ferroelectric HfAlOx also exhibited robust polarization characteristics under endurance cycling test. A > 10(6) stressed cycles with 4 MV/cm can be measured and a long endurance was sustained over 5 x 10(7) cycles under 3.6 MV/cm. Therefore, the HfAlOx film showed the great promise for integrating in high performance ferroelectric memory with thermal budget concerns.
Negative Capacitance CMOS Field-Effect Transistors with Non-Hysteretic Steep Sub-60mV/dec Swing and Defect-Passivated Multidomain Switching
(2019-01-01)
Liu, Chien
;
Chen, Hsuan-Han
;
Hsu, Chih-Chieh
;
Fan, Chia-Chi
;
Hsu, Hsiao-Hsuan
We demonstrated that the 2.5nm-thick HfAO(x) N-type NCFET based on defect-passivated multidomain switching can achieve a minimum 9 mV/dec subthreshold swing (SS), a negligible hysteresis of 1 mV, an ultralow I-off of 135 fA/mu m, a large I-on/I-off ratio of 8.7x 10(7) and a sub-60 mV/dec SS over 5 decade. For P-type NCFET, the non-hysteretic steep-slope switch is still reached under the synergistic effect of gate stress, defect passivation and doping engineering. The Al doping and defect passivation play the key role for reducing trap-related leakage, enhancing NC, and stabilizing multidomain switching. The highly scaled HfAlOx. CMOS NCFET shows the potential for low power logic applications.
On the Variability of Threshold Voltage Window in Gate-Injection Versatile Memories with Sub-60mV/dec Subthreshold Swing and 10(12)-Cycling Endurance
(2016)
Chiu, Yu-Chien
;
Chang, Chun-Yen
;
Yen, Shiang-Shiou
;
Fan, Chia-Chi
;
Hsu, Hsiao-Hsuan
Incorporating a charge-trapped ZrSiO with ferroelectric HfZrO dielectrics, we demonstrated a gate-injection versatile memory with sub-60mV/dec subthreshold swing (SS) and large threshold voltage window (Delta V-T) of >2V under a fast 20-ns speed. Moreover, it is revealed that the local defects at ZrSiO/HfZrO interface affect the ferroelectric negative capacitance tuning and thus increases the variability of V-T and SS during 10(12) cycling endurance.
Program/Erase Speed and Data Retention Trade-Off in Negative Capacitance Versatile Memory
(2017-01-01)
Fan, Chia-Chi
;
Chiu, Yu-Chien
;
Liu, Chien
;
Liou, Guan-Lin
;
Lai, Wen-Wei
In this work, we investigated the performance tradeoff between program/erase speed and data retention of ferroelectric HfZrO memory. The monoclinic HfNO layer with a trapping mechanism was employed to improve the data retention. Under the thickness optimization of HfNO, the HfZrO/HfNO gate stack can be functionalized with volatile and non-volatile operation.
Simulation-based study of negative-capacitance double-gate tunnel field-effect transistor with ferroelectric gate stack
(2016-04-01)
Liu, Chien
;
Chen, Ping-Guang
;
Xie, Meng-Jie
;
Liu, Shao-Nong
;
Lee, Jun-Wei
The concept of ferroelectric (FE) negative capacitance (NC) may be a turning point in overcoming the physical limitations imposed by the Boltzmann tyranny to realize next-generation state-of-the-art devices. Both the body factor (m-factor) and the transport mechanism (n-factor) are simultaneously improved by integrating an NC with a tunnel FET (TFET). The modeling approach is discussed in this study as well as the NC physics. By optimizing the thicknesses of FE, semiconductor, and interfacial layers, the capacitance of the FE layers is modulated to match that of a MOS resulting in the smallest subthreshold swing that is also hysteresis-free. An ultrathin-body double gate tunnel FET (UTB-DG-TFET) exhibits a steep slope (a subthreshold swing below 10 mV/dec over more than 4 orders of magnitude) for low-power applications (<0.2V switching voltage) to realize next-generation state-of-the-art devices. (C) 2016 The Japan Society of Applied Physics