Browsing by Author "Lou, Jen-Chung"

Now showing 1 - 20 of 25

Characteristics of the Fluorinated High-k Inter-Poly Dielectrics
(2010-12-01)
Hsieh, Chih-Ren
;
Chen, Yung-Yu
;
Lu, Kwung-Wen
;
Lin, Gray
;
Lou, Jen-Chung
In this letter, the reliabilities and insulating characteristics of the fluorinated aluminum oxide (Al(2)O(3)) and hafnium oxide (HfO(2)) inter-poly dielectric (IPD) are studied for the first time. Compared with the IPDs without fluorine incorporation, the results clearly indicate that fluorine incorporation process is effective to improve the insulating characteristics of both the Al(2)O(3) and HfO(2) IPDs, mainly ascribed to the trap density reduction and the smooth interface. Although HfO(2) possesses higher dielectric constant to increase the gate coupling ratio, the results apparently indicate that the fluorine incorporation process is more effective to improve the dielectric characteristics of the Al(2)O(3) IPD than the HfO(2) IPD.
Characterization of Oxygen Accumulation in Indium-Tin-Oxide for Resistance Random Access Memory
(2014-06-01)
Zhang, Rui
;
Chang, Kuan-Chang
;
Chang, Ting-Chang
;
Tsai, Tsung-Ming
;
Huang, Syuan-Yong
In this letter, we report the oxygen accumulation effect and its influence on resistive switching for gadolinium-doped silicon dioxide (Gd:SiO2) resistance random access memory (RRAM). We find that oxygen absorbance by indium-tin-oxide electrode affects the conduction current mechanism, and remarkably modifies the device performance of RRAM devices. By current fitting, Schottky emission can be observed in both low and high resistance states, from which conduction model is proposed to clarify the oxygen accumulation phenomenon. Reliability tests, including endurance and high temperature retention are further carried out, evaluating the significance of oxygen accumulation effect in redox reaction for RRAM devices.
Effect of fluorinated silicate glass passivation layer on electrical characteristics and dielectric reliabilities for the HfO(2)/SiON gate stacked nMOSFET
(2010-11-01)
Hsieh, Chih-Ren
;
Chen, Yung-Yu
;
Lou, Jen-Chung
;
電機工程學系
;
Department of Electrical and Computer Engineering
The superior characteristics of the fluorinated hafnium oxide/oxynitride (HfO(2)/SiON) gate dielectric are investigated comprehensively. Fluorine is incorporated into the gate dielectric through fluorinated silicate glass (FSG) passivation layer to form fluorinated HfO(2)/SiON dielectric. Fluorine incorporation has been proven to eliminate both bulk and interface trap densities due to Hf-F and Si-F bonds formation, which can strongly reduce trap generation as well as trap-assisted tunneling during subsequently constant voltage stress, and results in improved electrical characteristics and dielectric reliabilities. The results clearly indicate that the fluorinated HfO(2)/SiON gate dielectric using FSG passivation layer becomes a feasible technology for future ultrathin gate dielectrics applications. (C) 2010 Elsevier B.V. All rights reserved.
Effect of fluorinated silicate glass passivation layer on electrical characteristics and dielectric reliabilities for the HfO2/SiON gate stacked nMOSFET
(2010-11-01)
Hsieh, Chih-Ren
;
Chen, Yung-Yu
;
Lou, Jen-Chung
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
The superior characteristics of the fluorinated hafnium oxide/oxynitride (HfO2/SiON) gate dielectric are investigated comprehensively. Fluorine is incorporated into the gate dielectric through fluorinated silicate glass (FSG) passivation layer to form fluorinated HfO2/SiON dielectric. Fluorine incorporation has been proven to eliminate both bulk and interface trap densities due to Hf-F and Si-F bonds formation, which can strongly reduce trap generation as well as trap-assisted tunneling during subsequently constant voltage stress, and results in improved electrical characteristics and dielectric reliabilities. The results clearly indicate that the fluorinated HfO2/SiON gate dielectric using FSG passivation layer becomes a feasible technology for future ultrathin gate dielectrics applications. (C) 2010 Elsevier B.V. All rights reserved.
Effect of interfacial fluorination on the electrical properties of the inter-poly high-k dielectrics
(2011-06-01)
Hsieh, Chih-Ren
;
Chen, Yung-Yu
;
Lu, Kwung-Wen
;
Lin, Gray
;
Lou, Jen-Chung
In this paper, the reliabilities and insulating characteristics of the fluorinated aluminum oxide (Al(2)O(3)) and hafnium oxide (HfO(2)) inter-poly dielectric (IPD) are studied. Interface fluorine passivation has been demonstrated in terminating dangling bonds and oxygen vacancies, reducing interfacial re-oxidation and smoothing interface roughness, and diminishing trap densities. Compared with the IPDs without fluorine incorporation, the results clearly indicate that fluorine incorporation process is effective to improve the insulating characteristics of both the Al(2)O(3) and HfO(2) IPDs. Moreover, fluorine incorporation will also improve the dielectric quality of the interfacial layer. Although HfO(2) possesses higher dielectric constant to increase the gate coupling ratio, the results also demonstrate that fluorination of the Al(2)O(3) dielectric is more effective to promote the IPD characteristics than fluorination of the HfO(2) dielectric. For future stack-gate flash memory application, the fluorinated Al(2)O(3) IPD undoubtedly possesses higher potential to replace current ONO IPD than the fluorinated HfO(2) IPD due to superior insulating properties. (c) 2010 Elsevier B.V. All rights reserved.
Effect of UV illumination on inverted-staggered a-Si : H thin film transistors
(2007)
Li, Yiming
;
Lou, Jen-Chung
;
Chen, Chung-Le
;
Hwang, Chih-Hong
;
Yan, Shuoting
The hydrogenated amorphous silicon thin-film transistors (a-Si:H TFT's) have been widely used as switching devices for large-area electronics, such as active matrix liquid crystal displayers. Effect of UV Illumination on improving device switching characteristics has been experimentally observed and studied. However, the inside mechanisms including state and density of traps, are not clear yet. In this work, to characterize the optimal device characteristics, we thus solve a set of Poisson, electron/hole continuity, and lattice heat flow equations coupling with density and distribution of trap states in the a-Si:H layer. The I-V characteristics of the inverted staggered a-Si:H TFT's with different magnitude of UV light illumination is for the first time calculated and carefully calibrated with experimental measured data. It is found that the traps states in the a-Si:H layer and the movement of Fermi level from the conduction band after UV illumination. This study provides an insight into the effect of UV illumination and the mechanism to improve the switching characteristics of a-Si TFTs.
Endurance improvement and resistance stabilization of transparent multilayer resistance switching devices with oxygen deficient WOx layer and heat dissipating AlN buffer layer
(2017-12-31)
Lin, Yu-Hsuan
;
Huang, Ding-Chiuan
;
Lou, Jen-Chung
;
Tseng, Tseung-Yuen
;
電子工程學系及電子研究所
In this study, indium tin oxide (ITO), zinc oxide (ZnO), tungsten oxide (WOx), and aluminum nitride (AlN) were employed to fabricate and investigate four transparent resistive random access memory (ReRAMs) structures: ITO/ZnO/ITO (structure 1), ITO/WO3/ZnO/ITO (structure 2), ITO/WOx(x < 3)/WO3/ZnO/ITO (structure 3), and ITO/WOx(x < 3)/WO3/ZnO/AlN/ITO (structure 4). Structure 4 exhibited less variation in low-resistance states, lower operating voltages, and higher endurance compared with other structures. This phenomenon was attributed to the oxygen-deficient WOx layer in structure 4, which acted as an oxygen ion reservoir for efficient resistive changes, and the WO3 layer limited the filament rupture and formation region. Moreover, the high thermal conductivity of the AlN layer alleviated the thermally activated ion movement of the ReRAM and strengthened the high-resistance state. Structure 4 was found to be the optimal structure, with median operating voltages 1.6 V for SET operations and -1.0 V for RESET operations, retention of > 10(4) s at 200 degrees C, and endurance of 10(4) cycles with a resistance ratio of over 20. Structure 4 exhibited extremely high stability in both low- and high-resistance states during cycling. The transmittance of structure 4 was 85.49%, which is suitable for optoelectronic applications.
Endurance Improvement Technology With Nitrogen Implanted in the Interface of WSiOx Resistance Switching Device
(2013-07-01)
Syu, Yong-En
;
Zhang, Rui
;
Chang, Ting-Chang
;
Tsai, Tsung-Ming
;
Chang, Kuan-Chang
Incorporation of nitrogen as an oxygen-confining layer in the resistance switching reaction region is investigated to improve the reliability of resistance random access memory (RRAM). The switching mechanism can be attributed to the formation and rupture of conduction filaments. A compatible WSiON (around 5 nm) layer is introduced at the interface of tungsten silicon oxide (WSiOx) and TiN electrode to prevent the randomly diffusing oxygen ions surpassing the storage region of the WSiON layer. The double-layer WSiOx/WSiON memory structure would enhance the endurance over 100 times so as to better confirm the WSiOx RRAM application of nonvolatile memory.
Enhanced data retention characteristic on SOHOS-type nonvolatile flash memory with CF4-plasma-induced deep electron trap level
(2011)
Hsieh, Chih-Ren
;
Chen, Yung-Yu
;
Lin, Wen-Shin
;
Lin, Gray
;
Lou, Jen-Chung
The improved data retention characteristics of Polysilicon-oxide-hafnium oxide-oxide-silicon (SOHOS) type nonvolatile memory were obtained by post-HfO2 trapping layer deposition tetrafluoromethane (CF4) plasma treatment. The memory characteristics such as program/erase speed, retention and endurance were studied comprehensively. That fluorine atoms incorporated into Hf-based high-k material eliminate shallow trap defect level effectively and remain deeper trap level. Although the shallow traps of the HfOF trapping layer SOHOS memory have passivated, it doesn't deteriorate the program/erase speed obviously and retention characteristic was then improved because of deeper electron storage level. The results clearly indicate CF4 plasma treatment-induced deep electron storage level is a feasible technology for future SOHOS-type nonvolatile flash memory application.
Fabrication of pattern-depended metal induced lateral crystallization polysilicon thin film transistors with NH3 plasma passivation effects
(2005)
Chou, Cheng-Wei
;
Wu, Yung-Chun
;
Wu, Yuan-Chun
;
Chang, Ting-Chang
;
Liu, Po-Tsun
A pattern-dependent metal-induced lateral crystallized (PDMILC) poly-Si thin film transistor was successfully demonstrated and characterized. The fabrication of new PDMILC is simple with only four-mask process. After NH3 plasma passivation, the device performance was enhanced, including the high on/off current ration (>10(6)), the high mobilit (31.19 cm(2)/Vs), and the steep subtreshold swing (0.483 V/dec). The performance of PDMLC TFT with NH3 plasma passivation is superior to that of the counterpart without NH3 plasma passivation. The NH3 plasma treatment can result in the effective hydrogen passivation of the grain-boundary dangling bonds, and the nitrogen piile-up at SiO2/poly-Si interface.
HfO2 Inter-Poly Dielectric Characteristics with Interface Fluorine Passivation
(2009)
Chen, Yung-Yu
;
Hsieh, Chih-Ren
;
Lu, Kwung-Wen
;
Lou, Jen-Chung
;
電子工程學系及電子研究所
In this paper, the reliabilities and insulating characteristics of the fluorinated hafnium oxide (HIO2) inter-poly dielectric (IPD) through fluorine ion implantation are studied for the first time. HfO2 IPD characteristics are strongly dependent on the fluorine implantation dosage. Due to the terminating dangling bonds and oxygen vacancies, reducing interface oxidation and smoothing interface roughness, optimized fluorinated HfO2 can be used to drastically improve the IPD reliabilities; consequently, this study concludes that fluorinated HfO2 IPD is suitable for mass production applications in the future stacked-gate flash memory technology.
High performance of graphene oxide-doped silicon oxide-based resistance random access memory
(2013-11-21)
Zhang, Rui
;
Chang, Kuan-Chang
;
Chang, Ting-Chang
;
Tsai, Tsung-Ming
;
Chen, Kai-Huang
In this letter, a double active layer (Zr:SiO (x) /C:SiO (x) ) resistive switching memory device with outstanding performance is presented. Through current fitting, hopping conduction mechanism is found in both high-resistance state (HRS) and low-resistance state (LRS) of double active layer RRAM devices. By analyzing Raman and FTIR spectra, we observed that graphene oxide exists in C:SiO (x) layer. Compared with single Zr:SiO (x) layer structure, Zr:SiO (x) /C:SiO (x) structure has superior performance, including low operating current, improved uniformity in both set and reset processes, and satisfactory endurance characteristics, all of which are attributed to the double-layer structure and the existence of graphene oxide flakes formed by the sputter process.
Hopping Effect of Hydrogen-Doped Silicon Oxide Insert RRAM by Supercritical CO2 Fluid Treatment
(2013-05-01)
Chang, Kuan-Chang
;
Pan, Chih-Hung
;
Chang, Ting-Chang
;
Tsai, Tsung-Ming
;
Zhang, Rui
In this letter, we introduced hydrogen ions into titanium metal doped into SiO2 thin film as the insulator of resistive random access memory (RRAM) by supercritical carbon dioxide (SCCO)(2) fluid treatment. After treatment, low resistance state split in to two states, we find the insert RRAM, which means it has an operating polarity opposite from normal RRAM. The difference of the insert RRAM is owing to the resistive switching dominated by hydrogen ions, dissociated from OH bond, which was not by oxygen ions as usual. The current conduction mechanism of insert RRAM was hopping conduction due to the metal titanium reduction reaction through SCCO2.
Impact of Charge Trapping Effect on Negative Bias Temperature Instability in P-MOSFETs with HfO(2)/SiON Gate Stack
(2008)
Chen, Shih-Chang
;
Chien, Chao-Hsin
;
Lou, Jen-Chung
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
In our study, we systematically investigated the behavior of charge trapping in P-MOSFETs with HfO(2)/SiON gate stack. We found that typical linear extrapolation does not work well for the lifetime extraction at normal operation condition since the polarity of dominant trapped charge in high-kappa dielectric is not the same at lower and higher stress voltage regimes. This phenomenon is considered the competition of hole trapping and electron trapping with respect to applied gate voltages. Besides, the results of AC stress reveal the distinct responses to electrons and holes. It indicates that electrons can easily follow the AC signal while holes seem to need more time for the response at AC stress.
Improved performance and reliability for metal-oxide-semiconductor field-effect-transistor with fluorinated silicate glass passivation layer
(2010-01-11)
Hsieh, Chih-Ren
;
Chen, Yung-Yu
;
Lou, Jen-Chung
;
電機工程學系
;
Department of Electrical and Computer Engineering
The superior characteristics of the fluorinated HfO(2)/SiON gate dielectric are investigated comprehensively. Fluorine is incorporated into the gate dielectric through fluorinated silicate glass (FSG) passivation layer to form fluorinated HfO(2)/SiON dielectric. Fluorine incorporation has been proved to eliminate both bulk and interface trap densities due to Hf-F and Si-F bonds formation, which can strongly reduce trap generation as well as trap-assisted tunneling during subsequently constant voltage stress, and results in improved electrical characteristics and dielectric reliabilities. The results clearly indicate that the fluorinated HfO(2)/SiON gate dielectric using FSG passivation layer becomes a feasible technology for future ultrathin gate dielectric applications.
Improvements of ozone surface treatment on the electrical characteristics and reliability in HfO2 gate stacks
(2007-09-01)
Chen, Shih-Chang
;
Chen, Yung-Yu
;
Chang, Yu-Tzu
;
Lou, Jen-Chung
;
Kin, Kon-Tsu
In this study, we improved the interfacial properties of high-kappa gate stacks with the surface treatment of ozonated water prior to deposition of hafnium oxide (HfO2). We demonstrated that the Ozone-oxide improved the electrical properties of the HfO2 gate stack interface in terms of its smoother interface, lower leakage current density, narrower hysteresis width, superior charge trapping effect, and reliability. From these experimental results, we believe that treatment with ozone is an efficient method for the preparation of high-quality interfaces between HfO2 and silicon surfaces.
Mechanism of power consumption inhibitive multi-layer Zn:SiO2/SiO2 structure resistance random access memory
(2013-12-21)
Zhang, Rui
;
Tsai, Tsung-Ming
;
Chang, Ting-Chang
;
Chang, Kuan-Chang
;
Chen, Kai-Huang
In this paper, multi-layer Zn:SiO2/SiO2 structure is introduced to reduce the operation power consumption of resistive random access memory (RRAM) device by modifying the filament formation process. And the configuration of multi-layer Zn:SiO2/SiO2 structure is confirmed and demonstrated by auger electron spectrum. Material analysis together with conduction current fitting is applied to qualitatively evaluate the carrier conduction mechanism on both low resistance state and high resistance state. Finally, single layer and multilayer conduction models are proposed, respectively, to clarify the corresponding conduction characteristics of two types of RRAM devices. (C) 2013 AIP Publishing LLC.
Nitrogen Buffering Effect on Oxygen in Indium-Tin-Oxide-Capped Resistive Random Access Memory With NH3 Treatment
(2015-11-01)
Chen, Ji
;
Chang, Kuan-Chang
;
Chang, Ting-Chang
;
Tsai, Tsung-Ming
;
Pan, Chih-Hung
In this letter, we demonstrate the differing influences of a nitrogen buffering effect in both the switching layer and the indium-tin-oxide (ITO) electrode layer of resistive random access memory (RRAM) which has undergone an NH3 treatment. The nitrogen buffering effect in the switching layer cannot counteract the electric field force, leading to similar I-V characteristics compared with the ITO/Hf:SiO2/TiN control structure RRAM. The nitrogen in the ITO electrode layer, however, works as an oxygen buffer and makes it easier for the redox reaction to occur, leading to improvements in performance, such as concentrated voltages and better endurance.
Nonvolatile memory characteristics of nickel-silicon-nitride nanocrystal
(2007-08-20)
Chen, Wei-Ren
;
Chang, Ting-Chang
;
Liu, Po-Tsun
;
Yeh, Jui-Lung
;
Tu, Chun-Hao
The formation of nickel-silicon-nitride nanocrystals by sputtering a comixed target in the argon and nitrogen environment is proposed in this letter. High resolution transmission electron microscope analysis clearly shows the nanocrystals embedded in the silicon nitride and x-ray photoelectron spectroscopy also shows the chemical material analysis of nanocrystals. The memory window of nickel-silicon-nitride nanocrystals enough to define 1 and 0 states is obviously observed, and a good data retention characteristic to get up to 10 years is exhibited for the nonvolatile memory application.
Reliability Improvement of HfO(2)/SiON Gate Stacked nMOSFET using Fluorinated Silicate Glass Passivation Layer
(2009-01-01)
Hsieh, Chih-Ren
;
Chen, Yung-Yu
;
Chung, Jer-Fu
;
Lou, Jen-Chung
;
電子工程學系及電子研究所
In this paper, the reliability of the fluorinated hafnium oxide (HfO(2)) gate dielectric using novel and CMOS compatible fluorinated silicate glass (FSG) process has been studied comprehensively for the first time. Due to dangling bonds and oxygen vacancies recovery by the fluorine atoms, higher transconductance, smaller stress-induced threshold voltage and interface state degradation are therefore obtained for the fluorinated HfO(2)/SiON gate stack.