Browsing by Author "McAlister, SP"

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3D GOI CMOSFETs with novel IrO2(Hf) dual gates and high-kappa dielectric on 1P6M-0.18 mu m-CMOS
(2004)
Yu, DS
;
Chin, A
;
Laio, CC
;
Lee, CF
;
Cheng, CF
For the first time, we demonstrate 3D integration of self-aligned IrO2(Hf)/LaAlO3/GOI CMOSFETs above 0.18 pm Si CMOSFETs. At EOT=1.4nm, the novel IrO2(Hf) dual gates (4.4 and 5.1 eV workfunction) on control 2D LaAlO3/Si devices have high electron and hole mobilities of 203 and 67 cm(2)/Vs. On the 3D structure the LaAlO3/GOI shows even higher 389 and 234 cm(2)/Vs mobilities, and process compatibility with current Si VLSI. The higher drive current, larger integration density, shorter interconnects distance, and simple process of 3D approach can help solve the AC power issue and 2D scaling limitation.
A novel program-erasable high-(K) A1N-Si MIS capacitor
(2005-03-01)
Lai, CH
;
Chin, A
;
Hung, BF
;
Cheng, CF
;
Yoo, WJ
We demonstrate a programmable-erasable MIS capacitor with a single layer high-kappa AIN dielectric on Si having a high capacitance density of 5 fF/mum(2). It has low program and erase voltages of +4 and -4 V, respectively. Such an erase function is not available in other single layer Al2O3, AION, or other known high-kappa dielectric capacitors, where the threshold voltage (T h) shifts continuously with voltage. This device exhibits good data retention with a V-th change of only 0.06 V after 10 000 s.
A quantum trap MONOS memory device using AlN
(2006)
Lai, CH
;
Wu, CH
;
Chin, A
;
Wang, SJ
;
McAlister, SP
We report a IrO2-HfAlO-AlN-SiO2-Si MONOS device that displays excellent characteristics in terms of speed (100 mu s at +/- 13 V for program/erase) and memory window (3.7 V) at 85 degrees C operation. This device also shows good 10-year extrapolated data retention with a large 1.9 V window at 85 degrees C. The achieved performance compares well with the best reported memory device data. (c) 2006 The Electrochemical Society.
A tunable and program-erasable capacitor on Si with excellent tuning memory
(2004)
Lai, CH
;
Lee, CF
;
Chin, A
;
Zhu, C
;
Li, MF
A novel tunable and program-erasable high-kappa: AIN MIS capacitor is demonstrated for the first time with excellent tuning memory, which is useful to tune the impedance mismatching and resonance frequency without always connected voltage bias circuit. Large C-max /C-min tunability of 12 is obtained due to the high-kappa AIN dielectric with high 5 muF/mum(2) capacitance density. Good tuning memory is evidenced from the small V-th variation after program or erase at +4 V or -4 V for 10,000 s and the potential of years long extrapolated memory time.
AC power loss and signal coupling in very large scale integration backend interconnects
(2006-04-01)
Chen, CC
;
Kao, HL
;
Liao, CC
;
Chin, A
;
McAlister, SP
Both the coupling and AC power losses in integrated circuit interconnects in the radio-frequency regime have been measured. The AC power loss decreases with decreasing length, decreasing spacing, and increasing inter metal dielectric (IMD) thickness of parallel metal lines. The unwanted signal coupling and cross-talk monotonically decrease with increasing spacing and decreasing length of the parallel metal lines. However, increasing the IMD thickness from 0.7 to 6 mu m improves the low frequency performance but not the maximum operation frequency. Using a high-resistivity Si (HRS) substrate the AC power loss is significantly reduced but is traded off with an increase in coupling loss. The most effective method of reducing both the AC power and coupling losses is the combined use of three dimensional (3D) integration and an HRS, which gives larger than 1-2 orders of magnitude improvement, up to 20 GHz.
Broad-spectrum light emission at microscopic breakdown sites in metal-insulator-silicon tunnel diodes
(2005-09-01)
Mihaychuk, JG
;
Denhoff, MW
;
McAlister, SP
;
McKinnon, WR
;
Chin, A
In addition to Si band-edge electroluminescence (EL) near 1.1 eV, we observe hot-electron EL in metal-insulator-silicon tunnel diodes that can span a detector-limited range from 0.7 to 2.6 eV (1780-480 nm). The maximum photon energy increases with increasing forward bias. In one implementation, sub-micron-sized EL sites appear during the forward-bias stress. The number of sites grows linearly with the current, consistent with the dielectric breakdown of the insulator. We compare the poststress current-voltage data with the quantum-point-contact model. Results are presented for various p-type Si(100) devices having 2-8-nm-thick SiO2, Al2O3, and HfOxNy insulators. We also describe devices in which electron-beam lithography of an 18-nm-thick SiO2 is used to define EL sites. (c) 2005 American Institute of Physics.
Device level characterization for energy bandgap of strain-relaxed SiGe and oxide/SiGe barrier height
(2004)
Huang, CH
;
Yu, DS
;
Chin, A
;
Chen, WJ
;
McAlister, SP
From the interface state density with energy plot measured by capacitance-voltage characteristics, we have derived the energy bandgap of strain-relaxed Si1-xGex (x: 0.4 and 0.7) for the first time at the device level, because the allowed states increases sharply near the conduction and valence bandedges. We find that the energy bandgap of SiGe is reduced from 0.90 to 0.83 eV as the Ge composition increases from Si0.6Ge0.4 to Si0.3Ge0.7. In contrast, similar oxide/Si1-xGex conduction-band barrier heights of similar to3.1 eV have been obtained for both SiGe cases using Fowler-Nordheim tunneling. These results are in good agreement with published theoretical and experimental data from material level characterization. The device level characterization is especially important because the SiGe composition and material property may be altered after thermal cycles for device fabrication. (C) 2004 The Electrochemical Society.
Electrical-stress effects and device modeling of 0.18-mu m RF MOSFETs
(2006-04-01)
Kao, HL
;
Chin, A
;
Liao, CC
;
Chen, CC
;
McAlister, SP
in this paper, a novel microstrip-line layout is used to make accurate measurements of the minimum noise figure (NFmin) of RF MOSFETs. A low NFmin of 1.05 dB at 10 GHz was directly measured for 16-finger 0.18-mu m MOSFETs, without de-embedding. Using an analytical expression for NFmin, we have developed a self-consistent dc current-voltage, S-parameter, and NF in model, where the simulated results match the measured device characteristics well, both before and after electrical stress.
High performance CPW and microstrip ring resonators on silicon substrates
(2004-09-20)
Chen, CC
;
Hung, BF
;
Chin, A
;
McAlister, SP
;
電子工程學系及電子研究所
High performance CPW and novel microstrip ring resonators at similar to30 GHz and 40 GHz have been fabricated on Si substrates, using an optimized proton-implantation process. Very good insertion loss and resonator characteristics, close to those from ideal electromagnetic simulations, were measured. In contrast, the ring resonators on VLSI-standard Si, without implantation, have worse transmission and reflection loss, thus prohibiting applications in RF circuits. (C) 2004 Wiley Periodicals, Inc.
High work function IrxSi gates on HfAlON p-MOSFETs
(2006-02-01)
Wu, CH
;
Yu, DS
;
Chin, A
;
Wang, SJ
;
Li, MF
We have fabricated the fully silicided IrxSi-gated p-MOSFETs on HfAlON gate dielectric with 1.7-mn equivalent oxide thickness. After 950 degrees C rapid thermal annealing, the fully IrxSi/HfAlON device has high effective work function of 4.9 eV, high peak hole mobility of 80 cm(2)/V.s, and the advantage of being process compatible to the current VLSI fabrication line.
High-kappa Ir/TiTaO/TaN capacitors suitable for analog IC applications
(2005-07-01)
Chiang, KC
;
Huang, CC
;
Chin, A
;
Chen, WJ
;
McAlister, SP
We have developed novel high-k Ir/TiTaO/TaN capacitors which have high-capacitance density (10.3 fF/mu m(2)), small leakage current at 2 V (1.2 x 10(-8) A/cm(2)), and low voltage linearity of the capacitance (89 ppm/V-2). These excellent results meet the TTRS roadmap requirements for precision -analog capacitors for the year 2018. The good performance is due to the very high K (45) achieved in the TiTaO dielectric and the high work-function (5.2 eV) provided by the Ir electrode.
High-performance bulk and thin-film microstrip transmission lines on VLSI-standard Si substrates
(2004-10-20)
Chen, CC
;
Hung, BF
;
Chin, A
;
McAlister, SP
;
電子工程學系及電子研究所
Microstrip transmission lines with very low power loss of 0.4 dB/mm at 50 GHz have been fabricated on Si substrates using an optimized ion-implantation process. These devices have the inherent advantages of smaller chip Size and better power performance than CPW lines. Using the same approach, high-performance thin-film microstrip lines are also developed, showing a loss of 0.9 dB/mm at 20 GHz. This approach is compatible with existing VLSI backend layout technology. (C) 2004 Wiley Periodicals, Inc.
High-performance microwave coplanar bandpass and bandstop filters on Si substrates
(2003-09-01)
Chan, KT
;
Chin, A
;
Li, MF
;
Kwong, DL
;
McAlister, SP
High-performance bandpass and bandstop microwave coplanar filters, which operate from 22 to 91 GHz, have been fabricated on Si substrates. This was achieved using an optimized proton implantation process that converts the standard low-resistivity (similar to10 Omega (.) cm) Si to a semi-insulating state. The bandpass filters consist of coupled lines to form a series resonator, while the bandstop filter was designed in a double-folded short-end stub structure. For the bandpass filters at 40 and 91 GHz, low insertion loss was measured, close to electromagnetic simulation values. We also fabricated excellent bandstop filters with very low transmission loss of similar to1 dB and deep band rejection at both 22 and 50 GHz. The good filter performance was confirmed by the higher substrate impedance to ground, which was extracted from the well-matched S-parameter equivalent-circuit data.
High-performance poly-silicon TFTs incorporating LaAlO3 as the gate dielectric
(2005-06-01)
Hung, BF
;
Chiang, KC
;
Huang, CC
;
Chin, A
;
McAlister, SP
We have integrated a high-κ, LaAlO3 dielectric into low-temperature poly-Si (LTPS) thin-film transistors (TFTs). Good TFT performance was achieved-such as a high drive current, low threshold voltage and subthreshold slope, as well as an excellent on/off current ratio and high gate-dielectric breakdown field. This was achieved without hydrogen passivation or special crystallization steps. The good performance is related to the high gate capacitance density and small equivalent-oxide thickness provided by the high-κ dielectric.
Lanthanide and Ir-based dual metal-gate/HfAlON CMOS with large work-function difference
(2005)
Yu, DS
;
Chin, A
;
Wu, CH
;
Li, MF
;
Zhu, C
Metallic diffusion through high-K HfO(2), caused by high temperature metal-nitride decomposition, was reduced by using robust HfAlON. Useful dual effective work-function (phi(m,eff)) of 4.25 and 5.15 eV are obtained in TaTb(0.2)N/HfAlON and Ir/HfAlON at 1.7nm EOT. Good dual phi(m,eff) of 4.15 and 4.9 eV are also obtained in Yb(x)Si/HfAlON and Ir(x)Si/HfAlON FUSI-gates by reduced metal diffusion at lower temperature.
Light emission near 1.3 mu m using ITO-Al2O3-Si0.3Ge0.7-Si tunnel diodes
(2004-01-01)
Lin, CY
;
Chin, A
;
Hou, YT
;
Li, MF
;
McAlister, SP
We have fabricated Sn:In2O3 (ITO)-Al2O3 dielectric on Si1-xGex-Si metal-oxide-semiconductor tunnel diodes which emit light at around 1.3 mum, for x = 0.7. The emitted photon energy is smaller than the bandgap energy of Si, thus, avoiding strong light absorption by the Si substrate. The optical device structure is compatible with that of a metal-oxide-semiconductor field-effect transistor, since a conventional doped poly-Si gate electrode will be transparent to the emitted light. Increasing the Ge composition from 0.3 to 0.4 only slightly decreases the light-emitting efficiency.
Low noise and high gain RF MOSFETs on plastic substrates
(2005)
Kao, HL
;
Chin, A
;
Huang, CC
;
Hung, BF
;
Chiang, KC
A low minimum noise figure (NFmin) of 1.2 dB and high associated gain of 12.8 dB at 10 GHz, were measured for 0.18 mu m RF MOSFETs on plastic, made by substrate thinning (similar to 30 mu m), transfer and bonding. The performance can be further improved to 0.96 dB NFmin and 14.1 dB associated gain at 10 GHz, under applied tensile strain, using flexible Si on plastic. A 3.5 nH inductor on plastic showed a 55% higher Q-factor with a wider frequency range, compared with that on a Si substrate.
Low noise RF MOSFETs on flexible plastic substrates
(2005-07-01)
Kao, HL
;
Chin, A
;
Hung, BF
;
Lee, CF
;
Lai, JM
We report a low minimum noise figure (NFmin) of 1.1 dB and high associated gain (12 dB at 10 GHz) for 16 gate-finger 0.18-mu m RF MOSFETs, after thinning down the Si substrate to 30 mu m and mounting it on plastic. The device performance was improved by flexing the substrate to create stress, which produced a 25% enhancement of the saturation drain current and lowered NFmin to 0.92 dB at 10 GHz. These excellent results for mechanically strained RF MOSFETs on plastic compare well with 0.13-mu m node (L-g = 80 nm) devices.
Low RF loss and noise of transmission lines on Si substrates using an improved ion implantation process
(2003)
Chan, KT
;
Chin, A
;
McAlister, SP
;
Chang, CY
;
Tseng, C
Very low power loss less than or equal to 0.6 dB at 110 GHz and noise of < 0.25 dB at 18 GHz have been measured on transmission lines fabricated on Si substrates and implanted with proton. In contrast, much worse power loss of 5 dB and higher noise of 2.5 dB were measured without implantation. This large improvement arises from the high resistivity by proton implantation, which was also done after forming the transmission lines and at a reduced energy of similar to 4 MeV for easier process integration into current VLSI technology.
Low voltage high speed SiO(2)/AlGaN/AlLaO(3)/TaN memory with good retention
(2005)
Chin, A
;
Laio, CC
;
Chen, C
;
Chiang, KC
;
Yu, DS
To improve trapping using deeper well AlGaN (chi=3.8eV), lower voltage drop in high-K AlLaO(3) barrier (kappa=23), and smaller erase current by large Delta E(c) of AILaO(3)/TaN, the SiO(2)/AlGaN/AlLaO(3)/TaN devices show good 85 degrees C memory integrity of low +/- 10V 1ms P/E, large 3.9V initial Delta V(th) and 2.4V extrapolated 10-year retention. A fast 100ps P/E of +/- 11V still gives 3.0V initial Delta V(th) and 1.6V 10-year retention.