Browsing by Author "Wang, Shin-Yuan"

Now showing 1 - 17 of 17

A study of resistive switching effects on a thin FeO(x) transition layer produced at the oxide/iron interface of TiN/SiO(2)/Fe-contented electrode structures
(2010-02-01)
Feng, Li-Wei
;
Chang, Chun-Yen
;
Chang, Yao-Feng
;
Chen, Wei-Ren
;
Wang, Shin-Yuan
Large (>10(2)) and stable resistance switching characteristics were demonstrated in TiN/SiO(2)/Fe structure due to the presence of a thin FeO(x) transition layer at the SiO(2)/Fe interface, produced spontaneously during the plasma-enhanced tetraethyl orthosilicate oxide deposition process. Addition of Pt into Fe electrode, i.e., a TiN/SiO(2)/Fe(0.73)Pt(0.27) structure, was observed to improve the data dispersion of switching parameters, associating with the decrease in Fe content inside the FeO(x) layer. Additionally, current-voltage fitting data shows that current transport mechanism is governed by Ohm's law in low voltage region and Pool-Frenkel behavior in high voltage region, consisting with FeO(x) phase transition characteristics.
A study of resistive switching effects on a thin FeOx transition layer produced at the oxide/iron interface of TiN/SiO2/Fe-contented electrode structures
(2010-02-01)
Feng, Li-Wei
;
Chang, Chun-Yen
;
Chang, Yao-Feng
;
Chen, Wei-Ren
;
Wang, Shin-Yuan
Large (>10(2)) and stable resistance switching characteristics were demonstrated in TiN/SiO2/Fe structure due to the presence of a thin FeOx transition layer at the SiO2/Fe interface, produced spontaneously during the plasma-enhanced tetraethyl orthosilicate oxide deposition process. Addition of Pt into Fe electrode, i.e., a TiN/SiO2/Fe0.73Pt0.27 structure, was observed to improve the data dispersion of switching parameters, associating with the decrease in Fe content inside the FeOx layer. Additionally, current-voltage fitting data shows that current transport mechanism is governed by Ohm's law in low voltage region and Pool-Frenkel behavior in high voltage region, consisting with FeOx phase transition characteristics.
Demonstrating 1 nm-oxide-equivalent-thickness HfO2/InSb structure with unpinning Fermi level and low gate leakage current density
(2013-09-30)
Hai-Dang Trinh
;
Lin, Yueh-Chin
;
Minh-Thuy Nguyen
;
Hong-Quan Nguyen
;
Quoc-Van Duong
In this work, the band alignment, interface, and electrical characteristics of HfO2/InSb metaloxide-semiconductor structure have been investigated. By using x-ray photoelectron spectroscopy analysis, the conduction band offset of 1.78 +/- 0.1 eV and valence band offset of 3.35 +/- 0.1 eV have been extracted. The transmission electron microscopy analysis has shown that HfO2 layer would be a good diffusion barrier for InSb. As a result, 1 nm equivalent-oxide-thickness in the 4 nm HfO2/InSb structure has been demonstrated with unpinning Fermi level and low leakage current of 10(-4) A/cm(-2). The D-it value of smaller than 10(12) eV(-1) cm(-2) has been obtained using conduction method. (C) 2013 AIP Publishing LLC.
Electrical Characteristics of Al2O3/InSb MOSCAPs and the Effect of Postdeposition Annealing Temperatures
(2013-05-01)
Hai Dang Trinh
;
Lin, Yueh Chin
;
Chang, Edward Yi
;
Lee, Ching-Ting
;
Wang, Shin-Yuan
The characteristics of Al2O3/InSb MOSCAPs processed with different postdeposition annealing (PDA) temperatures are investigated. X-ray photoelectron spectroscopy analysis shows a significant reduction of InSb-oxides after HCl plus trimethyl aluminum treatment and oxide deposition. Multifrequency capacitance-voltage (C-V) characteristics exhibit low-frequency and asymmetrical C-V behaviors, in which capacitance in the InSb conduction band side is lower than in the valence band side. The electrical properties of the MOSCAPs are sensitive to PDA temperature and degraded significantly at PDA temperature > 300 degrees C. This degradation is closely related to the diffusion of In, Sb into Al2O3 as indicated by transmission electron microscopy analyses.
Five-element circuit model using linear-regression method to correct the admittance measurement of metal-oxide-semiconductor capacitor
(2009-01-01)
Cheng, Chao-Ching
;
Chien, Chao-Hsin
;
Luo, Guang-Li
;
Liu, Jun-Cheng
;
Chen, Yi-Cheng
The authors present a linear-regression method based on a five-element circuit model to correct measured capacitance-voltage and conductance-voltage curves. This model explains the effects of series resistance and parasitic capacitance/inductance on the frequency dispersion of measured capacitance and the magnification of measured conductance. These extracted parasitic components show significant dependencies on the geometry of capacitor structure, thereby causing different frequency-dependent capacitance characteristics in measurements. (C) 2009 American Vacuum Society. [DOI: 10.1116/1.3058724]
Highly scaled equivalent oxide thickness of 0.66nm for TiN/HfO2/GaSb MOS capacitors by using plasma-enhanced atomic layer deposition
(2017-08-01)
Tsai, Ming-Li
;
Wang, Shin-Yuan
;
Chien, Chao-Hsin
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
Through in situ hydrogen plasma treatment (HPT) and plasma-enhanced atomic-layer-deposited TiN (PEALD-TiN) layer capping, we successfully fabricated TiN/HfO2/GaSb metal-oxide-semiconductor capacitors with an ultrathin equivalent oxide thickness of 0.66nm and a low density of states of approximately 2 x 10(12)cm(-2) eV(-1) near the valence band edge. After in situ HPT, a native oxide-free surface was obtained through efficient etching. Moreover, the use of the in situ PEALD-TiN layer precluded high-. dielectric damage that would have been caused by conventional sputtering, thereby yielding a superior high-. dielectric and low gate leakage current. (C) 2017 The Japan Society of Applied Physics
Improvement of resistance switching characteristics in a thin FeO(x) transition layer of TiN/SiO(2)/FeO(x)/FePt structure by rapid annealing
(2010-05-31)
Feng, Li-Wei
;
Chang, Chun-Yen
;
Chang, Yao-Feng
;
Chang, Ting-Chang
;
Wang, Shin-Yuan
In this paper, the influence of a 600 degrees C rapid thermal annealing for 60 s on the improvements of resistance switching behaviors in a TiN/SiO(2)/FeO(x)/FePt structure is reported. It is found that besides the distinct reduction in memory switching parameters in forming voltage, set/reset voltages, and their dispersions, the resistance ratio of high-resistance state to low-resistance state is also enlarged after annealing. The effects of annealing on improving the resistance switching properties are discussed by x-ray diffraction and x-ray photon-emission spectra depth profile results. Additionally, good retention characteristics are exhibited in the annealed TiN/SiO(2)/FeO(x)/FePt resistance switching memory. (C) 2010 American Institute of Physics. [doi:10.1063/1.3428777]
Improvement of resistance switching characteristics in a thin FeOx transition layer of TiN/SiO2/FeOx/FePt structure by rapid annealing
(2010-05-31)
Feng, Li-Wei
;
Chang, Chun-Yen
;
Chang, Yao-Feng
;
Chang, Ting-Chang
;
Wang, Shin-Yuan
In this paper, the influence of a 600 degrees C rapid thermal annealing for 60 s on the improvements of resistance switching behaviors in a TiN/SiO2/FeOx/FePt structure is reported. It is found that besides the distinct reduction in memory switching parameters in forming voltage, set/reset voltages, and their dispersions, the resistance ratio of high-resistance state to low-resistance state is also enlarged after annealing. The effects of annealing on improving the resistance switching properties are discussed by x-ray diffraction and x-ray photon-emission spectra depth profile results. Additionally, good retention characteristics are exhibited in the annealed TiN/SiO2/FeOx/FePt resistance switching memory. (C) 2010 American Institute of Physics. [doi:10.1063/1.3428777]
Influence of post deposition annealing temperatures on electrical properties of Al2O3/InSb MOSCAPs
(2012-01-01)
Hai-Dang Trinh
;
Lin, Yue-Chin
;
Chang, Edward Yi
;
Hong-Quan Nguyen
;
Wang, Shin-Yuan
The influence of post deposition annealing (PDA) temperatures on electrical characteristics of Al2O3/InSb metal-oxide-semiconductor capacitor (MOSCAP) structures is investigated. Low frequency C-V responses with strong inversion behavior in the whole range of measured frequency (100 Hz-1 MHz) are observed, indicating very short minority carrier response time in InSb. The PDA temperature of 300 degrees C and above would result in the reduction of maximum capacitance. At the PDA temperature of above 300 degrees C the C-V hysteresis, frequency dispersion and stretch out increases significantly, indicating the degradation of the MOSCAP structures. The degradation might relate to the interdiffusion between Al2O3 and InSb during thermal steps.
InGaAs Metal-Oxide-Semiconductor FETs with Self-Aligned Ni-Alloy Source/Drain
(2015)
Wang, Shin-Yuan
;
Chien, Chao-Hsin
;
Lin, Jin-Ju
;
Chang, Chun-Yen
;
電子工程學系及電子研究所
N-type InGaAs MOSFETs with self-aligned nickel-InGaAs alloy and ex-situ ALD Al2O3 as gate dielectrics was successfully fabricated. The InGaAs MOSFETs exhibit an S/D resistance (RSD) that is lower than that in P-N junction devices due to the low Schottky barrier height and the peak mobility was about 1138 cm(2)/V-s and the interface state density (D-it) was about 10(12) cm(-2)eV(-1) at ET = EV + 0.6 eV by using full-conductance method
Integration of Hetero-Structure Body-Tied Ge FinFET Using Retrograde-Well Implantation
(2016)
Chou, Yu-Che
;
Hsu, Chung-Chun
;
Chun, Cheng-Ting
;
Chou, Chen-Han
;
Tsai, Ming-Li
In this work, we investigated the influence of retrograde-well implantation on hetero-structure body-tied germanium (Ge) FinFET [1]. Using structural engineering, the retrograde well was fabricated prior to Ge epitaxy, which could avoid the activated temperature of dopant in Si substrate. With optimizing the implant condition, the p-Ge/n-Si hetero-structure junction exhibited high I-ON/I-OFF ratio and lower junction leakage (4x10(-3)mu A/cm(2)). Furthermore, we also make a comparison of planar and mesa junction structures, mesa junction exhibited lower junction leakage (6x10(-6)mu A/cm(2))as compared with the planar one mentioned before, which could be attributed to improvement in peripheral leakage due to dislocation within Ge and Si. Comparing the difference between retrograde-well and implant-free Ge FinFETs, the drain induced barrier lowering (DIBL) was considerably improved by 50 %. Our retrograde-well Ge FinFET exhibited a high I-ON/I-OFF ratio similar to 8x10(3) (I-S) than the conventional Ge FinFET (I-ON/I-OFF similar to 2x10 (3)).
Integration of microwave-annealed oxidation on germanium metal-oxide-semiconductor devices
(2018-09-01)
Hsu, Chung-Chun
;
Chi, Wei-Chun
;
Tsai, Yi-He
;
Tsai, Ming-Li
;
Wang, Shin-Yuan
In this paper, a method that entails using microwave thermal oxidation to form a high-quality gate dielectric on Ge through surface passivation at considerably low temperatures (<400 degrees C) is presented. Formation of the GeOx layer was confirmed by x-ray photoelectron spectroscopy. To reduce the bulk trap density and interface trap density (D-it), microwave thermal oxidation was employed for post-deposition microwave thermal oxidation after the deposition of Al2O3 through atomic layer deposition. Tiny frequency dispersion in capacitance measurement and a low D-it value of 5.9 x 10(11) cm(-2) eV(-1) near the midgap confirmed a desirable passivation effect, which was favorable in mitigating the formation of dangling bonds on the Ge surface. A small hysteresis in capacitance was also observed, suggesting that the bulk dielectric was of high quality. On the basis of these characteristics, microwave-activated GeOx is a promising passivation layer material for aggressively scaled Ge-related metal oxide semiconductor devices. Published by the AVS.
Interface Characterization of HfO2/GaSb MOS Capacitors With Ultrathin Equivalent Oxide Thickness by Using Hydrogen Plasma Treatment
(2016-09)
Tsai, Ming-Li
;
Ko, Jun-Yu
;
Wang, Shin-Yuan
;
Chien, Chao-Hsin
;
電子工程學系及電子研究所
We investigate p-type GaSb MOS capacitors with various HfO2 thicknesses grown using an atomic layer deposition. GaSb surfaces treated with ex-situ chemical solution and in situ remote hydrogen plasma are inspected. After a series of etching steps, the GaSb surfaces exhibit smooth topography, indicating that this combination of treatments is capable of realizing ultrathin dielectric deposition. After etching processes, the ultrathin (approximately 3 nm) HfO2 layer deposited successfully on GaSb exhibit high-permittivity (approximately 21) properties as well as equivalent oxide thickness (EOT) of 0.75 nm, which can be attributed to the flat surface. To the best of our knowledge, the EOT of GaSb capacitor prepared using the exploited approach is record low. Furthermore, we find that the interlayer present after hydrogen plasma treatment and forming gas annealing could efficiently passivate interface state density and achieve high C-V modulation. Compared with the benchmark of gate leakage current versus EOT, the electrical performance with low gate leakage current of the GaSb MOS capacitors demonstrates the high feasibility of the proposed treatments.
Neuro-Inspired-in-Memory Computing Using Charge-Trapping MemTransistor on Germanium as Synaptic Device
(2020-09-01)
Chou, Yu-Che
;
Tsai, Chien-Wei
;
Yi, Chin-Ya
;
Chung, Wan-Hsuan
;
Wang, Shin-Yuan
In this work, we fabricated charge-trapping MemTransistors (CTMTs) on a germanium (Ge) substrate with a single-charge-trapping-layer gate-stack or a double-charge-trapping-layer gate-stack. We first constructed the energy band diagram of two gate stacks using transmission electron microscope (TEM) images and by X-ray photoelectron spectroscopy analysis. We deposited Al2O3 as a tunneling layer and a barrier layer using an atomic layer deposition (ALD) system while depositing HfO2 by ALD as the charge-trapping layer whose conduction band offset with respect to Al2O3 is 1.74 eV. Next, we demonstrated the memory characteristics of the CTMTs. By implementing the double-charge-trapping-layer gate-stack on the CTMT, we were able to enlarge the memory windows by 372 mV, improve the retention by 2.7%, and reduce the read disturbance. Furthermore, we demonstrated the synaptic device characteristics of the CTMTs. With the optimization of pulse schemes, we reduced the nonlinearity of potentiation (alpha(p)) and depression (alpha(d)) from 8.62 and -6.01 to 0.71 and 0.01, respectively, enlarged the ON/OFF ratio from 10.2 to 66.2, and increased the recognition accuracy from 24.5% to 82.1% simultaneously. With the implementation of the double-charge-trapping-layer gate-stack, we could further enlarge the ON/OFF ratio to 75.3 and increase the recognition accuracy to 86.5% simultaneously.
Reproducible resistance switching of a relatively thin FeO(x) layer produced by oxidizing the surface of a FePt electrode in a metal-oxide-metal structure
(2010-12-30)
Feng, Li-Wei
;
Chang, Yao-Feng
;
Chang, Chun-Yen
;
Chang, Ting-Chang
;
Wang, Shin-Yuan
In this study, reproducible resistance switching effects were demonstrated on a relatively thin FeO(x) layer in the TiN/SiO(2)/FeO(x)/FePt structure produced by oxidizing the surface of a FePt electrode during a plasma-enhanced tetraethyl orthosilicate oxide deposition process. Characteristics of the non-stoichiometric FeO(x) transition layer were examined by Auger electron spectroscopy, transmission electron microscopy, and X-ray photoelectron spectroscopy analyses. In addition, characteristics of the forming process as well as the current transport characteristics after forming process in the TiN/SiO(2)/FeO(x)/FePt structure were discussed. Moreover, the role of the silicon oxide layer was also experimentally demonstrated to act as an additional supplier of oxygen ions for the switching requirement by biasing high voltage bias conditions. (C) 2010 Elsevier B.V. All rights reserved.
Reproducible resistance switching of a relatively thin FeOx layer produced by oxidizing the surface of a FePt electrode in a metal-oxide-metal structure
(2010-12-30)
Feng, Li-Wei
;
Chang, Yao-Feng
;
Chang, Chun-Yen
;
Chang, Ting-Chang
;
Wang, Shin-Yuan
In this study, reproducible resistance switching effects were demonstrated on a relatively thin FeOx layer in the TiN/SiO2/FeOx/FePt structure produced by oxidizing the surface of a FePt electrode during a plasma-enhanced tetraethyl orthosilicate oxide deposition process. Characteristics of the non-stoichiometric FeOx transition layer were examined by Auger electron spectroscopy, transmission electron microscopy, and X-ray photoelectron spectroscopy analyses. In addition, characteristics of the forming process as well as the current transport characteristics after forming process in the TiN/SiO2/FeOx/FePt structure were discussed. Moreover, the role of the silicon oxide layer was also experimentally demonstrated to act as an additional supplier of oxygen ions for the switching requirement by biasing high voltage bias conditions. (C) 2010 Elsevier B.V. All rights reserved.
Study of High-Ge-Content Si0.16Ge0.84 Gate Stack by Low Pressure Oxidation
(2018-01-01)
Lee, Wei-Li
;
Zhang, Jun-Lin
;
Tsai, Ming-Li
;
Wang, Shin-Yuan
;
Luo, Guang-Li
In this study, we employed low-pressure oxidation (LPO) to achieve a high-quality dielectric gate stack on high-Ge-content (HGC) Si0.16Ge0.84. According to X-ray photoelectron spectroscopy depth-profiling results, lowering the oxidation pressure can drive out-diffusion of Si atoms from the HGC SiGe surface, resulting in the suppression of GeOx formation. A nearly GeOx-free interfacial layer detected at an O-2 pressure of 0.01 torr at 600 degrees C was used. Consequently, the formation of stable SiOx resulted in the improvement of D-it and gate leakage current, which in accumulation (V-FB-1V) was also considerably reduced with an equivalent oxide thickness of 1.5 nm. Finally, by applying the LPO process and optimized process conditions, the interface trap density (D-it) was reduced to 2 x 10(12) eV(-1) cm(-2). (C) 2018 The Electrochemical Society.