Browsing by Author "Yeh, F. S."

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A novel self-aligned etch-stopper structure with lower photo leakage for AMLCD and sensor applications
(2006-12-01)
Liang, Chung-Yu
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Gan, Feng-Yuan
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Liu, Po-Tsun
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Yeh, F. S.
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Chen, Stephen Hsin-Li
In this letter, the authors introduce a novel self-aligned etch-stopper sidewall-contact hydrogenated amorphous silicon (a-Si: H) thin-film transistor (ESSC-TFT), which reduces the photo leakage current by more than one order of magnitude and increases the ON-OFF ratio to seven orders of magnitude under back light illumination. Such a TFT will enable high-resolution and high-brightness liquid-crystal displays (LCDs) for next-generation TV, monitor, notebook, and mobile-phone applications. This ESSC-TFT design reduces the volume of a-Si film in which the active region can totally be shielded by the gate metal resulting in the prevention from direct back light illumination. With the sidewall contact, the hole current is reduced due to the smaller contact area between drain/source and a-Si layer. As well as the source, drain parasitic intrinsic resistance of a-Si can be also lessened by the ESSC-TFT structure. Although the defects between etched a-Si and n(+) a-Si film may degrade the ON current, the ESSC-TFT still exhibits higher ON-OFF ratio and lower leakage than the one in traditional etch-stopper (ES)-TFT structure. The ESSC-TFT structure can be used not only for TFT-LCD application but also for the applications that demand high ON-OFF ratio and low-leakage device, such as X-ray image sensor.
A Study on Frequency-Dependent Voltage Nonlinearity of SrTiO(3) rf Capacitor
(2010-01-01)
Cheng, C. H.
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Huang, C. C.
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Hsu, H. H.
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Chen, P. C.
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Chiang, K. C.
In this article, we investigate the frequency-dependent voltage nonlinearity effect of high-kappa Ni/SrTiO(3)/TaN and TaN/SrTiO(3)/TaN radio-frequency (rf) metal-insulator-metal (MIM) capacitors by electrical and thermal stresses. The experimental results demonstrated that the MIM-related capacitance properties, dependence of voltage and frequency, are not only affected by intrinsic dielectric properties but also shared by extrinsic effect, which possibly originated from the oxygen vacancies or electrode polarization. The high work-function Ni electrode can prevent the frequency-dependent voltage coefficient of capacitance characteristics from deterioration under the high temperature or continued voltage-stressing environments. (C) 2010 The Electrochemical Society. [DOI: 10.1149/1.3491490] All rights reserved.
A Study on Frequency-Dependent Voltage Nonlinearity of SrTiO3 rf Capacitor
(2010-01-01)
Cheng, C. H.
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Huang, C. C.
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Hsu, H. H.
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Chen, P. C.
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Chiang, K. C.
In this article, we investigate the frequency-dependent voltage nonlinearity effect of high-kappa Ni/SrTiO3/TaN and TaN/SrTiO3/TaN radio-frequency (rf) metal-insulator-metal (MIM) capacitors by electrical and thermal stresses. The experimental results demonstrated that the MIM-related capacitance properties, dependence of voltage and frequency, are not only affected by intrinsic dielectric properties but also shared by extrinsic effect, which possibly originated from the oxygen vacancies or electrode polarization. The high work-function Ni electrode can prevent the frequency-dependent voltage coefficient of capacitance characteristics from deterioration under the high temperature or continued voltage-stressing environments. (C) 2010 The Electrochemical Society. [DOI: 10.1149/1.3491490] All rights reserved.
Bipolar switching characteristics of low-power Geo resistive memory
(2011-08-01)
Cheng, C. H.
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Chen, P. C.
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Liu, S. L.
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Wu, T. L.
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Hsu, H. H.
We reported an ultra low-power resistive random access memory (RRAM) combining a low-cost Ni electrode and covalent-bond GeO(x) dielectric. This cost-effective Ni/GeO(x)/TaN RRAM device has very small set power of 2 mu W, ultra-low reset power of 130 pW, greater than 1 order of magnitude resistance window, and stable retention at 85 degrees C. The current flow at low-resistance state is governed by Poole-Frenkel conduction with electrons hopping via defect traps, which is quite different from the filament conduction in metal-oxide RRAM. (C) 2011 Elsevier Ltd. All rights reserved.
Characteristics of Cerium Oxide for Metal-Insulator-Metal Capacitors
(2010)
Cheng, C. H.
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Hsu, H. H.
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Chen, W. B.
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Chin, Albert
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Yeh, F. S.
In this article, we describe our successful fabrication of a CeO(2) metal-insulator-metal (MIM) capacitor with a low voltage nonlinearity. A low leakage current of 3.9 X 10(-7) A/cm(2) at -1 V and a small VCC-alpha similar to 421 ppm/V(2) were obtained at a high 10.8 fF/mu m(2) density for a Pt/CeO(2)/TaN MIM capacitor. The small VCC-alpha for a 15 nm thick CeO(2) dielectric (kappa similar to 20) was much better than the reported dielectrics of HfO(2), Tb-HfO(2), and Al(2)O(3)-HfO(2) at a similar kappa-value (15-20). The good analog performance was due to the combined effect of the CeO(2) dielectric and the high work-function metals. (C) 2009 The Electrochemical Society. [DOI: 10.1149/1.3258042] All rights reserved.
Comparison of MONOS memory device integrity when using Hf(1-x-y)N(x)O(y) trapping layers with different N compositions
(2008-06-01)
Yang, H. J.
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Cheng, C. F.
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Chen, W. B.
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Lin, S. H.
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Yeh, F. S.
We have studied the nitrogen composition dependence of the characteristics of TaN/HfLaON/Hf(1-x-y)N(x)O(y)/ SiO(2)/Si MONOS memory devices. By increasing the N composition in the Hf(1-x-y)N(x)O(y) trapping layer, both the memory window And high-temperature retention improved. The Hf(0.3)N(0.2)O(0.5) MONOS device displayed good characteristics in terms of its +/-9-V program/erase (P/E) voltage, 100-mu s P/E speed, large initial 2.8-V memory window, and a ten-year extrapolated retention of 1.8 V at 85 degrees C or 1.5 V at 125 degrees C.
Flat band voltage control on low V(t) metal-gate/high-kappa CMOSFETs with small EOT
(2009-07-01)
Chin, Albert
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Chang, M. F.
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Lin, S. H.
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Chen, W. B.
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Lee, P. T.
The unwanted high threshold voltage (V(t)) is the major challenge for metal-gate/high-kappa CMOs especially at small equivalent-oxide-thickness (EOT). We have investigated the high V(t) issue that is due to flat-band voltage (V(fb)) roll-off at smaller EOT. A mechanism of charged oxygen vacancies formed by interface reaction was proposed to explain the V(fb) roll-off effect. This interface reaction can be decreased by inserting a thin interfacial SiON and using novel low temperature process. The self-aligned and gate-first metal-gate/high-kappa CMCSFETs using these methods have achieved low V(t) and good control of V(fb) roll-off at small 0.6-1.2 nm EOT. Crown Copyright (C) 2009 Published by Elsevier B.V. All rights reserved,
Flat band voltage control on low V-t metal-gate/high-kappa CMOSFETs with small EOT
(2009-07-01)
Chin, Albert
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Chang, M. F.
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Lin, S. H.
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Chen, W. B.
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Lee, P. T.
The unwanted high threshold voltage (V-t) is the major challenge for metal-gate/high-kappa CMOs especially at small equivalent-oxide-thickness (EOT). We have investigated the high V-t issue that is due to flat-band voltage (V-fb) roll-off at smaller EOT. A mechanism of charged oxygen vacancies formed by interface reaction was proposed to explain the V-fb roll-off effect. This interface reaction can be decreased by inserting a thin interfacial SiON and using novel low temperature process. The self-aligned and gate-first metal-gate/high-kappa CMCSFETs using these methods have achieved low V-t and good control of V-fb roll-off at small 0.6-1.2 nm EOT. Crown Copyright (C) 2009 Published by Elsevier B.V. All rights reserved,
Good 150 degrees C Retention and Fast Erase Characteristics in Charge-Trap-Engineered Memory having a Scaled Si3N4 Layer
(2008)
Lin, S. H.
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Chin, Albert
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Yeh, F. S.
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McAlister, S. P.
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電子工程學系及電子研究所
We report a new charge-trap-engineered flash non-volatile memory that has combined 5nm Si3N4 and 0.9nm EOT HfON trapping layers, within double-barrier and double-tunnel layers. At 150 degrees C under a 100 mu s and +/- 16V P/E, this device showed good device integrity of a 5.6V initial Delta V-th window and 3.8V 10-year extrapolated retention window. These data are better than the 3.3V initial Delta V-th and 1.7V 10-year data for a similar structure not having the extra WON layer.
High density and low leakage current in TiO(2) MIM capacitors processed at 300 degrees C
(2008-08-01)
Cheng, C. H.
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Lin, S. H.
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Jhou, K. Y.
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Chen, W. J.
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Chou, C. P.
We report Ir/TiO(2)/TaN metal-insulator-metal capacitors processed at only 300 degrees C, which show a capacitance density of 28 fF/mu m(2) and a leakage current of 3 x 10(-8) (25 degrees C) or 6 x 10(-7) (125 degrees C) A/cm(2) at -1 V. This performance is due to the combined effects of 300 degrees C nanocrystallized high-kappa, TiO(2), a high conduction band offset, and high work-function upper electrode. These devices show potential for integration in future very-large-scale-integration technologies.
High Performance Ultra-Low Energy RRAM with Good Retention and Endurance
(2010)
Cheng, C. H.
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Tsai, C. Y.
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Chin, Albert
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Yeh, F. S.
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電子工程學系及電子研究所
High performance novel RRAM of 0.3 mu W set power (0.1 mu A at 3 V), 0.6 nW reset power (-0.3 nA at -1.8 V), fast 20 ns switching time, ultra-low 6 fJ switching energy, large 7x10(2) resistance window for 10(4) sec retention at 125 degrees C, and 10(6) cycling endurance were measured simultaneously. This is the first time that the switching energy of new non-volatile memory is close to existing Flash Memory.
High-Density and Low-Leakage-Current MIM Capacitor Using Stacked TiO(2)/ZrO(2) Insulators
(2009-07-01)
Lin, S. H.
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Chiang, K. C.
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Chin, Albert
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Yeh, F. S.
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電子工程學系及電子研究所
We have fabricated high-kappa Ni/TiO(2)/ZrO(2)/TiN metal-insulator-metal (MIM) capacitors. A low leakage current of 8 x 10(-8) A/cm(2) at 125 degrees C was obtained with a high 38-fF/mu m(2) capacitance density and better than the ZrO(2) MIM capacitors. The excellent device performance is due to the lower electric field in 9.5-nm-thick TiO(2)/ZrO(2) devices to decrease the leakage current and to a higher kappa value of 58 for TiO(2) as compared with that of ZrO(2) to preserve the high capacitance density.
High-Density and Low-Leakage-Current MIM Capacitor Using Stacked TiO2/ZrO2 Insulators
(2009-07-01)
Lin, S. H.
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Chiang, K. C.
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Chin, Albert
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Yeh, F. S.
;
電子工程學系及電子研究所
We have fabricated high-kappa Ni/TiO2/ZrO2/TiN metal-insulator-metal (MIM) capacitors. A low leakage current of 8 x 10(-8) A/cm(2) at 125 degrees C was obtained with a high 38-fF/mu m(2) capacitance density and better than the ZrO2 MIM capacitors. The excellent device performance is due to the lower electric field in 9.5-nm-thick TiO2/ZrO2 devices to decrease the leakage current and to a higher kappa value of 58 for TiO2 as compared with that of ZrO2 to preserve the high capacitance density.
High-kappa TiCeO MIM Capacitors with a Dual-Plasma Interface Treatment
(2010)
Cheng, C. H.
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Hsu, H. H.
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Hsieh, I. J.
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Deng, C. K.
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Chin, Albert
In this study, we successfully fabricated high-kappa Ir/TiCeO/TaN metal-insulator-metal (MIM) capacitors using a dual-plasma treatment on a bottom TaN electrode. The plasma treatment suppressed the growth of the bottom interfacial layer to largely improve capacitor performance at a 400 C thermal budget. The Ir/TiCeO/TaN MIM capacitor achieved a high capacitance density of similar to 17 fF/mu m(2) at a 22 nm thickness and a low quadratic coefficient of capacitance (VCC-alpha) of 866 ppm/V(2) at a 10.3 fF/mu m(2) density. The good performance is due to the combined effects of a dual-plasma interface treatment, higher-kappa TiCeO dielectrics, and a high work-function Ir metal. (C) 2010 The Electrochemical Society. [DOI: 10.1149/1.3294495] All rights reserved.
High-Performance MIM Capacitors Using a High-kappa TiZrO Dielectric
(2008)
Cheng, C. H.
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Pan, H. C.
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Lin, S. H.
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Hsu, H. H.
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Hsiao, C. N.
We have fabricated high-kappa Ni/TiZrO/TaN metal-insulator-metal (MIM) capacitors. A low leakage current of 3.3x10(-8) A/cm(2) at -1 V was obtained for a 18 fF/mu m(2) capacitance density. For a 5.5 fF/mu m(2) capacitance density device, a small voltage coefficient of capacitance alpha of 105 ppm/V(2) and temperature coefficient of capacitance of 156 ppm/degrees C were measured. (c) 2008 The Electrochemical Society. [DOI: 10.1149/1.2993977] All rights reserved.
Higher-kappa titanium dioxide incorporating LaAlO(3) as dielectrics for MIM capacitors
(2010-06-01)
Cheng, C. H.
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Hsu, H. H.
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Chen, P. C.
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Liou, B. H.
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Chin, Albert
In this work, we studied a TiO(2) mixed LaAlO(3) dielectric (TLAO) for metal-insulator-metal (MIM) capacitors. The resulting capacitor characteristics showed a high capacitance density of 23.2 fF/mu m(2) and a low leakage current of 7.5 x 10(-7) A/cm(2) at -1 V. Comparing to the control samples of TiLaO (ILO), TLAO dielectrics with Al(2)O(3) doping showed lower leakage current, smaller voltage nonlinearity and better time-dependent dielectric breakdown (TDDB) performance. Therefore, the TiO(2)-based dielectrics with the introduction of Al(2)O(3) might be favorable for the improved engineering of MIM capacitors. (C) 2010 Elsevier Ltd. All rights reserved.
Higher-kappa titanium dioxide incorporating LaAlO3 as dielectrics for MIM capacitors
(2010-06-01)
Cheng, C. H.
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Hsu, H. H.
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Chen, P. C.
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Liou, B. H.
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Chin, Albert
In this work, we studied a TiO2 mixed LaAlO3 dielectric (TLAO) for metal-insulator-metal (MIM) capacitors. The resulting capacitor characteristics showed a high capacitance density of 23.2 fF/mu m(2) and a low leakage current of 7.5 x 10(-7) A/cm(2) at -1 V. Comparing to the control samples of TiLaO (ILO), TLAO dielectrics with Al2O3 doping showed lower leakage current, smaller voltage nonlinearity and better time-dependent dielectric breakdown (TDDB) performance. Therefore, the TiO2-based dielectrics with the introduction of Al2O3 might be favorable for the improved engineering of MIM capacitors. (C) 2010 Elsevier Ltd. All rights reserved.
Highly uniform low-power resistive memory using nitrogen-doped tantalum pentoxide
(2012-07-01)
Cheng, C. H.
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Chen, P. C.
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Wu, Y. H.
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Wu, M. J.
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Yeh, F. S.
Highly uniform current distributions of high resistance state (HRS) and low resistance state (LRS), low 0.6 pJ switching energy, fast 30 ns switching speed, and good 10(6) cycling endurance are achieved in Ni/GeOx/Ta2O5-yNy/TaN resistive random access memory (RRAM) devices. Such good performance is attributed to nitrogen-related acceptor level in Ta2O5-yNy for better hopping conduction, which leads to forming-free resistive switching and low self-compliance switching currents. (C) 2012 Elsevier Ltd. All rights reserved.
Highly-Scaled 3.6-nm ENT Trapping Layer MONOS Device with Good Retention and Endurance
(2010)
Tsai, C. Y.
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Lee, T. H.
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Chin, Albert
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Wang, Hong
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Cheng, C. H.
Novel MONOS CTF, with record thinnest 3.6 nm ENT trapping layer, has a large 3.1 V 10-year extrapolated retention window at 125 degrees C and excellent 10(6) endurance at a fast 100 mu s and +/- 16 V program/erase. This is achieved using an As(+)-implanted higher. trapping layer with deep 5.1 eV work-function of As. In contrast, the un-implanted device only has a small 10-year retention window of 1.9 V at 125 degrees C.
Improved Device Characteristics in Charge-Trapping-Engineered Flash Memory Using High-kappa Dielectrics
(2009)
Chin, Albert
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Lin, S. H.
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Tsai, C. Y.
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Yeh, F. S.
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電子工程學系及電子研究所
The much shallower trap energy in Si3N4 of [poly-Si]-SiO2-Si3N4-SiO2- Si (SONOS) charge-trapping flash (CTF) device than conventional poly-Si floating gate flash is the fundamental challenge for CTF device. We have pioneered the high-trapping layer CTF memory to increase the trapping energy, where the AlGaN has a large conduction band offset to barrier oxide layer close to conventional poly-Si floating gate. Further device performance improvement is achieved using the novel Charge-Trapping-Engineered Flash (CTEF) device with double barriers for carrier confinements and double shallow-/deep-trapping layers for charge storage. Excellent memory device integrities of large extrapolated 10-year retention of 3.8 V at 150 degrees C, 4 logic levels MLC operation, very fast 100 mu s write speed and good 100,000 cycling stress are measured at the same time. These excellent results may allow further down-scaling the flash memory for additional nodes.