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公開日期標題作者
1-三月-1994BENCHMARKING AND ANALYSIS OF SUPERSCALAR ARCHITECTURESHIAU, YH; CHUNG, CP; 資訊科學與工程研究所; Institute of Computer Science and Engineering
1-三月-1994BENCHMARKING AND ANALYSIS OF SUPERSCALAR ARCHITECTURESHIAU, YH; CHUNG, CP; 資訊科學與工程研究所; Institute of Computer Science and Engineering
1-四月-1992A BOUND ANALYSIS OF SCHEDULING INSTRUCTIONS ON PIPELINED PROCESSORS WITH A MAXIMAL DELAY OF ONE CYCLECHOU, HC; CHUNG, CP; 交大名義發表; 資訊科學與工程研究所; National Chiao Tung University; Institute of Computer Science and Engineering
1991DUAL-ALU CRISC ARCHITECTURE AND ITS COMPILING TECHNIQUECHOU, HC; CHUNG, CP; CHENG, SC; 資訊科學與工程研究所; Institute of Computer Science and Engineering
1993MODELING OF SUPERSCALAR INSTRUCTION SCHEDULING AND ANALYSIS OF A HEURISTIC SCHEDULING ALGORITHMCHOU, HC; CHUNG, CP; 資訊科學與工程研究所; Institute of Computer Science and Engineering
1-一月-1995ON THE UPPER BOUND OF SCHEDULING INSTRUCTIONS ON PIPELINED PROCESSORS WITH DELAYCHOU, HC; CHUNG, CP; 資訊科學與工程研究所; Institute of Computer Science and Engineering
1-三月-1995AN OPTIMAL INSTRUCTION SCHEDULER FOR SUPERSCALAR PROCESSORCHOU, HC; CHUNG, CP; 交大名義發表; 資訊科學與工程研究所; National Chiao Tung University; Institute of Computer Science and Engineering
1-四月-1994OPTIMAL MULTIPROCESSOR TASK-SCHEDULING USING DOMINANCE AND EQUIVALENCE-RELATIONSCHOU, HC; CHUNG, CP; 資訊科學與工程研究所; Institute of Computer Science and Engineering
1-七月-1993REACHING APPROXIMATE AGREEMENT ON HYPERCUBECHENG, RL; CHUNG, CP; 資訊科學與工程研究所; Institute of Computer Science and Engineering
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