Browsing by Author Chou, Teyuh

Jump to: 0-9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
or enter first few letters:  
Showing results 1 to 5 of 5
Issue DateTitleAuthor(s)
9-Sep-20163D Ta/TaOx/TiO2/Ti synaptic array and linearity tuning of weight update for hardware neural network applicationsWang, I-Ting; Chang, Chih-Cheng; Chiu, Li-Wen; Chou, Teyuh; Hou, Tuo-Hung; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-Jan-2017Challenges and Opportunities toward Online Training Acceleration using RRAM-based Hardware Neural NetworkChang, Chih-Cheng; Liu, Jen-Chieh; Shen, Yu-Lin; Chou, Teyuh; Chen, Pin-Chun; Wang, I-Ting; Su, Chih-Chun; Wu, Ming-Hong; Hudec, Boris; Chang, Che-Chia; Tsai, Chia-Ming; Chang, Tian-Sheuan; Wong, H-S Philip; Hou, Tuo-Hung; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-Jan-2016Development of Three-Dimensional Synaptic Device and Neuromorphic Computing HardwareWang, I-Ting; Chou, Teyuh; Chiu, Li-Wen; Chang, Chih-Cheng; Hou, Tuo-Hung; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-Mar-2018Mitigating Asymmetric Nonlinear Weight Update Effects in Hardware Neural Network Based on Analog Resistive SynapseChang, Chih-Cheng; Chen, Pin-Chun; Chou, Teyuh; Wang, I-Ting; Hudec, Boris; Chang, Che-Chia; Tsai, Chia-Ming; Chang, Tian-Sheuan; Hou, Tuo-Hung; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2016應用類比電阻仿生神經突觸之硬體神經網路系統實現周德玉; 侯拓宏; Chou, Teyuh; Hou, Tuo-Hung; 電子研究所