瀏覽 的方式： 作者 Chen, Zuow-Zun
顯示 1 到 6 筆資料，總共 6 筆
| 公開日期 | 標題 | 作者 |
| 1-十二月-2016 | A 0.56 THz Phase-Locked Frequency Synthesizer in 65 nm CMOS Technology | Zhao, Yan; Chen, Zuow-Zun; Du, Yuan; Li, Yilei; Al Hadi, Richard; Virbila, Gabriel; Xu, Yinuo; Kim, Yanghyo; Tang, Adrian; Reck, Theodore J.; Chang, Mau-Chung Frank; 交大名義發表; National Chiao Tung University |
| 十二月-2016 | A 0.56 THz Phase-Locked Frequency Synthesizer in 65 nm CMOS Technology | Zhao, Yan; Chen, Zuow-Zun; Du, Yuan; Li, Yilei; Al Hadi, Richard; Virbila, Gabriel; Xu, Yinuo; Kim, Yanghyo; Tang, Adrian; Reck, Theodore J.; Chang, Mau-Chung Frank; 交大名義發表; National Chiao Tung University |
| 2016 | A 16Gb/s 14.7mW Tri-Band Cognitive Serial Link Transmitter with Forwarded Clock to Enable PAM-16 / 256-QAM and Channel Response Detection in 28 nm CMOS | Du, Yuan; Cho, Wei-Han; Li, Yilei; Wong, Chien-Heng; Du, Jieqiong; Huang, Po-Tsang; Kim, Yanghyo; Chen, Zuow-Zun; Lee, Sheau Jiung; Chang, Mau-Chung Frank; 交大名義發表; National Chiao Tung University |
| 2016 | Digital PLL for Phase Noise Cancellation in Ring Oscillator-Based I/Q Receivers | Chen, Zuow-Zun; Li, Yilei; Kuan, Yen-Cheng; Hu, Boyu; Wong, Chien-Heng; Chang, Mau-Chung Frank; 交大名義發表; National Chiao Tung University |
| 1-四月-2017 | DPLL for Phase Noise Cancellation in Ring Oscillator-Based Quadrature Receivers | Chen, Zuow-Zun; Kuan, Yen-Cheng; Li, Yilei; Hu, Boyu; Wong, Chien-Heng; Chang, Mau-Chung Frank; 交大名義發表; 國際半導體學院; National Chiao Tung University; International College of Semiconductor Technology |
| 2016 | An Integrated 0.56THz Frequency Synthesizer with 21GHz Locking Range and-74dBc/Hz Phase Noise at 1MHz Offset in 65nm CMOS | Zhao, Yan; Chen, Zuow-Zun; Virbila, Gabriel; Xu, Yinuo; Al Hadi, Richard; Kim, Yanghyo; Tang, Adrian; Reck, Theodore; Chen, Huan-Neng; Jou, Chewnpu; Hsueh, Fu-Lung; Chang, Mau-Chung Frank; 交大名義發表; National Chiao Tung University |
