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公開日期標題作者
1-一月-2019A 50 Gb/s Adaptive Dual Data-Paths NS-EICL ADFE with 50 Parallelisms for 2-PAM SystemsNg, Chee-Kit; Chiu, Kang-Lun; Lin, Yu-Chun; Jou, Shyh-Jye; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-四月-2020A 75-Gb/s/mm(2) and Energy-Efficient LDPC Decoder Based on a Reduced Complexity Second Minimum Approximation Min-Sum AlgorithmLopez, Henry; Chan, Hsun-Wei; Chiu, Kang-Lun; Tsai, Pei-Yun; Jou, Shyh-Jye Jerry; 交大名義發表; 電子工程學系及電子研究所; National Chiao Tung University; Department of Electronics Engineering and Institute of Electronics
1-九月-2020Design of Downlink Synchronization for Millimeter Wave Cellular System Based on Multipath Division Multiple AccessChiu, Kang-Lun; Shen, Pai-Hsiang; Lin, Bing-Ru; Hsiao, Wei-Han; Jou, Shyh-Jye Jerry; Huang, Chia-Chi; 電子工程學系及電子研究所; 電信工程研究所; Department of Electronics Engineering and Institute of Electronics; Institute of Communications Engineering
1-一月-2019A Millimeter Wave Digital CMOS Baseband Transceiver for Wireless LAN ApplicationsChiu, Kang-Lun; Chan, Hsun-Wei; Lee, Wei-Che; Wu, Chang-Ting; Lopez, Henry; Liu, Hung-Chih; Huang, Meng-Yuan; Liu, Chun-Yi; Lee, Tsai-Hua; Chang, Hsin-Ting; Jen, Chih-Wei; Chang, Nien-Hsiang; Tsai, Pei-Yun; Kuan, Yen-Cheng; Jou, Shyh-Jye; 電子工程學系及電子研究所; 國際半導體學院; Department of Electronics Engineering and Institute of Electronics; International College of Semiconductor Technology
顯示 1 到 4 筆資料，總共 4 筆