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Browsing by Author Hsiao, PY

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Showing results 1 to 15 of 15
Issue DateTitleAuthor(s)
1-Jan-1998Macro-cell placement fos custom-chip design using self-organizing fuzzy techniqueChang, RI; Hsiao, PY; 資訊工程學系; Department of Computer Science
1-Jan-1998Macro-cell placement fos custom-chip design using self-organizing fuzzy techniqueChang, RI; Hsiao, PY; 資訊工程學系; Department of Computer Science
1-Mar-1996Minimizing the number of switchboxes for region definition and ordering assignmentYan, JT; Hsiao, PY; 交大名義發表; 資訊工程學系; National Chiao Tung University; Department of Computer Science
1-Nov-1998MPT-based branch-and-bound strategy for scheduling problem in high-level synthesisHsiao, PY; Wu, GM; Su, JY; 電機資訊學士班; Undergraduate Honors Program of Electrical Engineering and Computer Science
1996An O(NlogN) algorithm for region definition using channels switchboxes and ordering assignmentYan, JT; Hsiao, PY; 交大名義發表; 資訊工程學系; National Chiao Tung University; Department of Computer Science
1995PLA-based Boolean factorization using ROBDDHsiao, PY; Liaw, RT; Su, JY; 資訊工程學系; Department of Computer Science
1-Mar-1997Planar constrained terminals over-the-cell routerShew, PW; Hsiao, PY; 資訊工程學系; Department of Computer Science
1-Mar-1997Planar constrained terminals over-the-cell routerShew, PW; Hsiao, PY; 資訊工程學系; Department of Computer Science
1995Unsupervised query-based learning algorithm and it's application to Kohonen's seif-organizing mapsChang, RI; Hsiao, PY; 資訊工程學系; Department of Computer Science
1-Mar-1997Unsupervised query-based learning of neural networks using selective-attention and self-regulationChang, RI; Hsiao, PY; 交大名義發表; 資訊工程學系; National Chiao Tung University; Department of Computer Science
1996Using ordered binary decision diagrams to factorize multi-level logicHsiao, PY; Liaw, RT; Su, JY; 交大名義發表; 資訊工程學系; National Chiao Tung University; Department of Computer Science
1995Variable ordering for PLA-based ROBDDSu, JY; Hsiao, PY; 資訊工程學系; Department of Computer Science
1-Dec-1995VLSI cell placement on arbitrarily-shaped rectilinear regions using neural networks with calibration nodesChang, RI; Hsiao, PY; 交大名義發表; 資訊工程學系; National Chiao Tung University; Department of Computer Science
1-Sep-1997VLSI circuit placement with rectilinear modules using three-layer force-directed self-organizing mapsChang, RI; Hsiao, PY; 資訊工程學系; Department of Computer Science
1-Sep-1997VLSI circuit placement with rectilinear modules using three-layer force-directed self-organizing mapsChang, RI; Hsiao, PY; 資訊工程學系; Department of Computer Science
Showing results 1 to 15 of 15