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公開日期標題作者
1-十一月-1994ANOMALOUS REVERSE SHORT-CHANNEL EFFECT IN P+ POLYSILICON GATED P-CHANNEL MOSFETCHANG, CY; LIN, CY; CHOU, JW; HSU, CCH; PAN, HT; KO, J; 電控工程研究所; 奈米中心; Institute of Electrical and Control Engineering; Nano Facility Center
1-九月-1993CHARGE LOSS DUE TO AC PROGRAM DISTURBANCE STRESSES IN EPROMSLIN, JK; CHANG, CY; WANG, TH; HUANG, HS; CHEN, KL; HO, TS; KO, J; 電控工程研究所; Institute of Electrical and Control Engineering
1-九月-1993A NEW DRAIN ENGINEERING STRUCTURE-SCD-LDD (SURFACE COUNTER DOPED LDD) FOR IMPROVED HOT-CARRIER RELIABILITYCHOU, JW; CHANG, CY; HO, LT; KO, J; HSUE, P; 電控工程研究所; Institute of Electrical and Control Engineering
1-七月-1994NEW LARGE-ANGLE TILT IMPLANTED DRAIN STRUCTURE - SURFACE COUNTER-DOPED-LIGHTLY DOPED DRAIN FOR HIGH HOT-CARRIER RELIABILITYCHOU, JW; CHANG, CY; HUANG, C; HO, LT; KO, J; HSUE, P; 電控工程研究所; 奈米中心; Institute of Electrical and Control Engineering; Nano Facility Center
1-三月-1992A NEW ON-CHIP ESD PROTECTION CIRCUIT WITH DUAL PARASITIC SCR STRUCTURES FOR CMOS VLSIWU, CY; KER, MD; LEE, CY; KO, J; 電控工程研究所; Institute of Electrical and Control Engineering
1994AN ON-CHIP ESD PROTECTION CIRCUIT WITH COMPLEMENTARY SCR STRUCTURES FOR SUBMICRON CMOS ICSKER, MD; WU, CY; JIANG, HC; LEE, CY; KO, J; HSUE, P; 電控工程研究所; Institute of Electrical and Control Engineering