瀏覽 的方式: 作者 Lai, Bo-Cheng

跳到: 0-9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
或是輸入前幾個字:  
顯示 1 到 20 筆資料,總共 28 筆  下一頁 >
公開日期標題作者
1-一月-1970Dual-wavelength fiber-optic technique to assist needle cricothyroidotomyLee, Chien-Ching; Chuang, Chia-Chun; Lai, Bo-Cheng; Lu, Chin-Li; So, Edmund Cheung; Lin, Bor-Shyh; 影像與生醫光電研究所; Institute of Imaging and Biomedical Photonics
1-一月-2019Efficient Write Scheme for Algorithm-based Multi-ported MemoryChen, Bo-Ya; Chen, Bo-En; Lai, Bo-Cheng; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-五月-2019Enhancing Utilization of SIMD-Like Accelerator for Sparse Convolutional Neural NetworksLai, Bo-Cheng; Pan, Jyun-Wei; Lin, Chien-Yu; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2017Merlin: 一個有效利用神經元及權重稀疏性的類神經網路加速器設計林建宇; 賴伯承; Lin, Chien-Yu; Lai, Bo-Cheng; 電子研究所
1-四月-2020A Novel Smart Assistance System for Blood Vessel Approaching: A Technical Report Based on OximetryLee, Chien-Ching; Chuang, Chia-Chun; Lai, Bo-Cheng; Huang, Yi-Chia; Chen, Jen-Yin; Lin, Bor-Shyh; 影像與生醫光電研究所; Institute of Imaging and Biomedical Photonics
1-三月-2020REMAP plus : An Efficient Banking Architecture for Multiple Writes of Algorithmic MemoryLai, Bo-Cheng; Chen, Bo-Ya; Chen, Bo-En; Hsin, Yi-Da; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-八月-2014Scalable Power Management Using Multilevel Reinforcement Learning for MultiprocessorsPan, Gung-Yu; Jou, Jing-Yang; Lai, Bo-Cheng; 交大名義發表; National Chiao Tung University
1-八月-2020Selective bypassing and mapping for heterogeneous applications on GPGPUsEmara, Moustafa; Lai, Bo-Cheng; 交大名義發表; National Chiao Tung University
1-一月-2018Supporting Compressed-Sparse Activations and Weights on SIMD-like Accelerator for Sparse Convolutional Neural NetworksLin, Chien-Yu; Lai, Bo-Cheng; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-十二月-2018Towards high performance data analytic on heterogeneous many-core systems: A study on Bayesian Sequential PartitioningLai, Bo-Cheng; Wu, Tung-Yu; Chiu, Tsou-Han; Li, Kun-Chun; Lee, Chia-Ying; Chien, Wei-Chen; Wong, Wing Hung; 交大名義發表; National Chiao Tung University
1-一月-2020A Two-Directional BigData Sorting Architecture on FPGAsLai, Bo-Cheng; Chen, Chun-Yen; Hsin, Yi-Da; Lin, Bo-Yen; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2011三維積體電路在通用圖形處理器裡基於力使量法的平行分割演算法陳琬菁; Chen,Wan-Jing; 賴伯承; Lai, Bo-Cheng; 電子研究所
2016個案研究:現代通用圖形處理器之卷積類神經網路之軟體與硬體改進林哲懷; 賴伯承; Lin, Che-Huai; Lai, Bo-Cheng; 電子研究所
2016卷積神經網路於現代繪圖處理器架構之設計探索廖子豪; 賴伯承; Liao, Zi-Hao; Lai, Bo-Cheng; 電子研究所
2016可程式化閘陣列之高效率多埠演算法記憶體設計黃琨驊; 賴伯承; Huang, Kun-Hua; Lai, Bo-Cheng; 電子工程學系 電子研究所
2012在多圖形處理器系統上實現高度平行化之單視角立體影像轉換演算法李冠儒; Li, Guan-Ru; 賴伯承; Lai, Bo-Cheng; 電子研究所
2013在多圖形處理器系統上考量運算負載與資料傳遞之工作排程方法王允廷; Wang, Yun-Ting; 賴伯承; Lai, Bo-Cheng; 電子工程學系 電子研究所
2015在多核心智慧型裝置上結合雲端運算及機器學習演算法所實現的電源管理策略潘畊宇; Pan, Gung-Yu; 周景揚; 賴伯承; Jou, Jing-Yang; Lai, Bo-Cheng; 電子工程學系 電子研究所
2015巨量資料之密度分析演算法在異質多核心平台之可擴充性設計與最佳化研究李佳穎; Lee, Chia-Ying; 賴伯承; Lai, Bo-Cheng; 電子工程學系 電子研究所
2015應用於可程式閘陣列之多埠記憶體設計林俊良; Lin, Jiun-Liang; 賴伯承; Lai, Bo-Cheng; 電子工程學系 電子研究所