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1-二月-2012Analytical Model of Subthreshold Current and Threshold Voltage for Fully Depleted Double-Gated Junctionless TransistorLin, Zer-Ming; Lin, Horng-Chih; Liu, Keng-Ming; Huang, Tiao-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2016Design of a Micro-Electrode Cell for Programmable Lab-on-CMOS PlatformHo, Yingchieh; Wang, Gary; Lai, Kelvin Yi-Tse; Lug, Yi-Wen; Liu, Keng-Ming; Wang, Yun-Ming; Lee, Chen-Yi; 生物科技學系; 電子工程學系及電子研究所; Department of Biological Science and Technology; Department of Electronics Engineering and Institute of Electronics
1-五月-2014The effects of channel doping concentration for n-type junction-less double-gate poly-Si nanostrip transistorsLiu, Keng-Ming; Peng, Fan-I; Peng, Kang-Ping; Lin, Horng-Chih; Huang, Tiao-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2015A Field-Programmable Lab-on-a-Chip with Built-in Self-Test Circuit and Low-Power Sensor-Fusion Solution in 0.35 mu m Standard CMOS ProcessLai, Kelvin Yi-Tse; Shiu, Ming-Feng; Lu, Yi-Wen; Ho, Yingchieh; Kao, Yu-Chi; Yang, Yu-Tao; Wang, Gary; Liu, Keng-Ming; Chang, Hsie-Chia; Lee, Chen-Yi; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2014Investigation of p-type junction-less independent double-gate poly-Si nano-strip transistorsLiu, Keng-Ming; Lin, Zer-Ming; Wu, Jiun-Peng; Lin, Horng-Chih; Huang, Tiao-Yuan; 光電工程學系; Department of Photonics
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