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公開日期標題作者
2001Automatic functional vector generation using the interacting FSM modelLiu, CNJ; Yen, CC; Jou, JY; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-三月-2004A divide-and-conquer-based algorithm for automatic simulation vector generationYen, CC; Jou, JY; Chen, KC; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2004Enhancing sequential depth computation with a branch-and-bound algorithmYen, CC; Jou, JY; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2005Formal compliance verification of interface protocolsYang, YC; Huang, JD; Yen, CC; Shih, CH; Jou, JY; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2002Integration of finite element analysis and optimum design on gear systemsLi, CH; Chiou, HS; Hung, CH; Chang, YY; Yen, CC; 機械工程學系; Department of Mechanical Engineering
2004On compliance test of on-chip bus for SOCLin, HM; Yen, CC; Shih, CH; Jou, JY; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2005An optimum algorithm for compacting error traces for efficient functional debuggingYen, CC; Jou, JY; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
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