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Item type:Item, Improved electrical properties of shallow p(+)-n junction using selectively grown graded Si1-xGex epitaxial structure(2000-12-01) ;Huang, HJ ;Chen, KM ;Chang, CY ;Huang, TYChen, LPA strained boron-doped graded Si1-xGex structure consisting of layered Si1-xGex with increasing Ge mole fractions was studied as the solid diffusion source for forming a p(+)-n junction suitable for raised source/drain metal oxide semiconductor field effect transistor (MOSFET) application. The in situ doped graded Si1-xGex structure was selectively epitaxially grown (SEG) on the active region using ultrahigh vacuum chemical molecular epitaxy (UHVCME). Improved electrical characteristics, not possible with conventional uniform SEG Si1-xGex junction, are achieved with the graded SEG Si1-xGex junction. For the conventional uniform Si1-xGex junction, while a high Ge composition is necessary for reducing the specific contact resistance and the sheet resistance, such a high Ge composition, also results in a degraded ideality factor and a leaky junction. In contrast, a near-perfect SiGe/Si interface property is demonstrated with the graded Si1-xGex structure. Optimum specific contact resistance and the sheet resistance can be obtained by the graded Si1-xGex structure without suffering degraded junction leakage and ideality factor. These results indicate that the degree of misfit dislocation and the undesirable undercut effects could be effectively reduced by using the graded structure with its lower Ge composition close to the silicon substrate, while a low sheet resistance and specific contact resistance is preserved with its higher Ge composition at the top of the layered structure. (C) 2000 The Electrochemical Society. S1099-0062(00)08-111-6. All rights reserved.Item type:Item, A new method to extract MOSFET threshold voltage, effective channel length, and channel mobility using S-parameter measurement(2004-05-01) ;Chen, HY ;Chen, KM ;Huang, GW ;Chang, CYHuang, TYIn this work, a simple method for extracting MOSFET threshold voltage, effective channel length and channel mobility by using S-parameter measurement is presented. In the new method, the dependence between the channel conductivity and applied gate voltage of the MOSFET device is cleverly utilized to extract the threshold voltage, while biasing the drain node of the device at zero voltage during measurement. Moreover, the effective channel length and channel mobility can also be obtained with the same measurement. Furthermore, all the physical parameters can be extracted directly on the modeling devices without relying on specifically designed test devices. Most important of all, only one S-parameter measurement is required for each device under test (DUT), making the proposed extraction method promising for automatic measurement applications.Item type:Item, A study of boron diffusion from selectively grown epitaxial silicon-germanium into silicon during rapid thermal annealing(2002) ;Yang, TH ;Chang, EY ;Chen, KM ;Chien, CHHuang, HJBoron diffusion from selectively grown epitaxial Si1-xGex into Si during rapid thermal annealing (RTA) was investigated. Selective epitaxial growth (SEG) of in-situ boron-doped strained Si1-xGex epitaxial layers with different Ge percentages were selectively grown by ultra high vacuum chemical molecular epitaxy (UHVCME). The results show that the boron diffusion depth from SEG Si1-xGex into n-type Si depends on boron concentration, Ge profile in the SEG area, and the size of the SEG area. Higher boron concentrations in SEG Si1-xGex film increases the boron diffusion depth. However, the diffusion depth can be reduced by increasing Ge composition in SEG Si1-xGex. It was also found that the samples with graded Ge profiles have higher diffusion depths than those with uniform profiles. In addition, the boron diffusion depth increases with the size of the SEG Si1-xGex area. The strain in SEG Si1-xGex, the chemical potential of Ge in SEG Si1-xGex and the dislocations induced in the SEG Si1-xGex layers are the main reasons for the phenomena observed.Item type:Item, Layout design of high-quality SOI varactor(2003) ;Chen, HY ;Chen, KM ;Huang, GW ;Huang, CHYang, THThis paper presents the geometry effect on the characteristics of accumulation type SOI varactor with Mesa-isolation technology. Constant gate area varactors with various geometry condition were implemented to investigate the effects of layout design parameters on overall varactor performance. Physical and mathematic analysis based on the measurement results show that parasitic capacitance at the edge of active region seriously degrads the device quality factor at smallest gate length. The optimized SOI varactor has a quality factor Q of about 150 /GHz/pF at medium gate length varactor. The experiment result can serve as a design reference for high-quality SOI varactors.Item type:Item, Computation of noise parameters using genetic algorithms(2004) ;Chen, HY ;Chen, KM ;Huang, GW ;Cho, MHChang, CYIn this study, an improved computation method for the noise parameters of a linear noisy two-port network is introduced. A new error function, which considers noise figure and source admittance error simultaneously, is proposed to estimate the four noise parameters. The global optimization of the error function is searched directly by using a genetic algorithm.Item type:Item, Hot-carrier induced degradations on RF power characteristics of SiGe heterojunction bipolar transistors(2004) ;Huang, SY ;Chen, KM ;Huang, GW ;Hsu, TLTseng, HCHot-carrier (HC) effects on high-frequency and RF power characteristics of Si/SiGe HBTs were investigated in this paper. We found that the small-signal current gain, output power, and power gain of Si/SiGe HBTs are suffered by the HC stress. With different bias conditions, the degradations of cutoff frequency and output power were found to be worse under constant base-current measurement than that under constant collector-current measurement. These phenomena have been explained by the change of the current gain, transconductance, and base-emitter resistance under stress.Item type:Item, Impact of hot carrier stress on RF power characteristics of MOSFETs(2005) ;Huang, SY ;Chen, KM ;Huang, GW ;Yang, DYChang, CYThis paper investigates hot-carrier (HQ effects on the RF power and linearity characteristics of MOS transistors using load-pull measurement. We found that the RF power characteristics are affected by the HC stress, and the linearity of MOS transistors is clearly degraded after HC stress at constant gate voltage measurement. However, at high gate voltage bias, the HC-induced power degradation is much reduced compared with that under low gate voltage regimes. In addition, HC effects on linearity can be softened by biasing the transistor at constant drain currents. These experimental observations can be explained by the change of threshold voltage, transconductance, subthreshold swing, and mobility degradation coefficient under HC stress.Item type:Item, Characterization and modeling of RF MOSFETs under hot carrier stress and oxide breakdown(2006) ;Huang, SY ;Chen, KM ;Huang, GW ;Yang, DYChang, CYEffects of hot carrier stress (HCS) and oxide breakdown (OBD) on the main figures-of-merit of RF MOSFETs are examined in this paper. We found that under the same dc degradation, the cut-off frequency (f(Tau)) and maximum oscillation frequency (f(max)) suffered mode seriously by OBD than by HCS. Minimum noise figure (NFmin) is one of the main concerns in RF characteristics. NFmin increased dramatically after OBD than that after HCS due to the added gate leakage paths. Those effects can be clarified and explained by using a constructed explained small-signal model.Item type:Item, RF MOSFET characterization by four-port measurement(2005-05-01) ;Wu, SD ;Huang, GW ;Chen, KM ;Tseng, HCHsu, TLRF MOSFET's are usually measured in common source configuration by a 2-port network analyzer, and the common gate and commen drain S-parameters cannot be directly measured from a conventional 2-port test structure. In this work, a 4-port test structure for on-wafer measurement of RF MOSFET's is proposed. Four-port measurements for RF MOSFET's in different dimensions and the de-embedded procedures are performed up to 20 GHz. The S-parameters of the RF MOSFET in common source (CS), common gate (CG), and common drain (CD) configurations are obtained from a single DUT and one measurement procedure. The dependence of common source S-parameters of the device on substrate bias are also shown.Item type:Item, A novel approach for parameter determination of HBT small-signal equivalent circuit(2005-06-01) ;Chen, HY ;Chen, KM ;Huang, GW ;Chang, CY電子工程學系及電子研究所Direct parameter extraction is believed to be the most accurate method for equivalent-circuits modeling of heterojunction bipolar transistors (HBT's). Using this method, the parasitic elements, followed by the intrinsic elements, are determined analytically. Therefore, the quality of the extrinsic elements extraction plays an important role in the accuracy and robustness of the entire extraction algorithm. This study proposes a novel extraction method for the extrinsic elements, which have been proven to be strongly correlated with the intrinsic elements. By utilizing the specific correlation. the equivalent circuit modeling is reduced to an optimistation problem of determining six specific extrinsic elements. Converting the intrinsic equivalent circuit into its common-col lector configuration, all intrinsic circuit elements are extracted using exact closed-form equations for both the hybrid-pi and the T-topology equivalent circuits. Additionally, a general explicit equation on the total extrinsic elements is derived, subsequently reducing the number of optimization variables. The modeling results are presented, showing that the proposed method can yield a good fit between the measured and calculated S parameters.