學術出版;;Publications

Permanent URI for this communityhdl:11536/1

收集所有交通大學研究人員與學生個人或團體所發表之各項學術著作，涵蓋期刊論文、教師專書、學位論文等項。;;Collections of Publications of NCTU Researchers and Students Like Journal Papers and Thesis.

Browse

Now showing 1 - 20 of 71839

(2016-07-25)
LEE DER-MING
;
CHIANG MING-KUEI
;
CHEN CHIN-TE
;
SUNG KENG-CHUAN
;
LAN CHIEN-JU
0.1 mu m poly-Si thin film transistors for system-on-panel (SoP) applications
(2005)
Tsui, BY
;
Lin, CP
;
Huang, CF
;
Xiao, YH
;
電子工程學系及電子研究所
Thin active layer, fully-silicided source/drain (S/D), modified Schottky barrier, high dielectric constant (high-k) gate dielectric, and metal gate technologies are integrated to realize high performance TFTs. Devices with 0.1 mu m channel length were fabricated successfully. Low threshold voltage, low subthreshold swing, high effective mobility, low S/D resistance, high on/off current ratio, and good control of threshold voltage are demonstrated.
0.13 mu m low voltage logic based RF CMOS technology with 115GHz f(T) and 80GHz f(MAX)
(2003)
Guo, JC
;
Huang, CH
;
Chan, KT
;
Lien, WY
;
Wu, CM
Superior RF CMOS of 115GHz f(T) and 80GHz f(max) has been realized by 0.13mum low voltage logic based RF CMOS technology by aggressive device scaling and optimized layout. NFmin of 2.2dB at 10GHz is achieved even without deep N-well and ground-shielded signal pad. P,dB of near 10dBm can fit bluetooth requirement and 55% PAE at 2.4 GHz address the good potential of sub-100nm CMOS for low voltage RF power applications.
0.13-mu M CMOS Q-BAND LEVELED-LO SUBHARMONIC MIXER WITH INJECTION-LOCKED FREQUENCY-DIVIDER QUADRATURE GENERATOR
(2009-11-01)
Su, Jen-Yi
;
Meng, Chinchun
;
Wu, Po-Yi
;
Huang, Guo-Wei
;
電子工程學系及電子研究所
In this article, a 40-GHz subharmonic Gilbert down-conversion mixer with an accurate quadrature local oscillator (LO) input is demonstrated using a standard 0.13-mu m CMOS technology. The quadrature-output frequency divider is realized by injection-locked oscillators and is used at the LO port to replace conventional RC-CR polyphase filters at higher frequencies. Furthermore, the proper Marchand balun at all RF stage is suitable for the standard Si-based process to generate precisely balanced signals despite the substrate loss. The measured conversion gat In is 4 dB at 40 GHz. The IP(1dB) IIP(3) of - 7 dBm and 2 dBm, respectively, tire achieved. The measured 3-dB RF bandwidth is very broad and about 12-GHz bandwidth when the 10-MHz IF frequency is fixed. The die Size is about I mm X I mm. (C) 2009 Wiley Periodicals, Inc. Microwave Opt Technol Lett 51: 2663-2665, 2009; Published online in Wiley InterScience (www.interscience.wiley.com), DOI 10.1002/mop.24714
0.13-mu m low-kappa-Cu CMOS logic-based technology for 2.1-Gb high data rate read-channel
(2004-05-01)
Guo, JC
;
Lien, WY
;
Tsai, TL
;
Chen, SM
;
Wu, CM
High-performance analog/digital elements have been successfully fabricated bya 0.13-mum low-kappa-Cu logic-based mixed-signal CMOS process in a single chip to enable a 2.1-Gb/s read-channel for hard disk drives that is a record-high data rate supported by fully CMOS solution. The high-performance analog devices demonstrate superior drivability, matching, noise immunity, and reliability by a unique dual-gate oxide module to support the aggressive oxide thickness scaling and maintain promisingly good reliability in all aspects.
0.13-mu m RF CMOS and varactors performance optimization by multiple gate layouts
(2004-12-01)
Ho, CC
;
Kuo, CW
;
Chan, Y
;
Lien, WY
;
Guo, JC
0.13-mum radio frequency (RF) CMOS devices with multifinger gate structure have been fabricated by the standard logic process, and the measured effective gate-length is 80 nm. Extensive RF characterization has been done to obtain cutoff frequency (f(T)), associated power gain cutoff frequency (f), minimum noise figure (NFmin), output power (P-out), and power added efficiency (PAE) for RF circuit design and to explore the optimized gate layout in terms of the extracted RF device parameters. Our important finding to be reported in this paper is that an optimized unit finger width (W-F) exists by trade-off among f(T), f(.max), NFmin, P-out, and PAE. Under fixed total width to achieve the same current drivability (I-ds), the smaller W-F and the larger finger number (N-F) leads to higher f(max) but lower f(T) due to trade-off between gate resistance (R-g) and parasitic gate capacitance. As for NFmin complicated by f(T) and R-g, counter-balance between parasitic gate capacitance and R-g leads to nearly constant NFmin. w.r.t. various splits of (W-F, N-F). Regarding P-out and PAE, W-F of 4 mum and NF of 18 is the optimized layout parameter, which offers the maximum P-out of around 11 dBm and PAE of 30.5% at 5.8 GHz. The performances of accumulation-mode MOS varactors with different gate layout structures are also investigated in this report. Since the same area varactors with different gate layout may result in different parasitic resistance and fringing capacitance, which will affect the capacitance tuning range and the associated Q-factor. The maximum Q-factor is about 59 of the 120 mum(2) gate area varactor, and its tuning range is from 210 IF to 1.64 pF, where the maximum C-max/C-min ratio is about 7.8.
0.18 mu m SiGe BiCMOS Microwave/Millimeter-wave Dual-Mode Dual-Conversion Receiver Architecture With a Tunable RF Channel Selection at Low-Flicker-Noise Microwave Mode
(2017-01-01)
Chang, Wei Ling
;
Meng, Chinchun
;
Yang, Shih-Der
;
Huang, Guo-Wei
;
電機工程學系
A dual-mode receiver architecture with tens-MHz channel bandwidth at microwave mode and GHz channel bandwidth at millimeter-wave mode is demonstrated in this work with a tunable active filter for RF channel selection at microwave mode using 0.18 mu m SiGe BiCMOS technology. A dual conversion is employed to accommodate the wide-channel-bandwidth 60-GHz mode at the first conversion stage and the high-level-modulation 5-GHz mode is merged to the second conversion stage through sharing the 5-GHz switchable Gilbert IQ mixers with the 60-GHz mode. A tunable RF active filter is inserted between the 5-GHz LNA and the second stage mixer to serve as RF channel selection at the 5-GHz mode with the ability of relaxing the stringent linearity requirement imposed by high-level-modulation scheme. 10 dB gain with a 2-GHz channel bandwidth at the 60-GHz mode and 23 dB gain with a 20 MHz channel bandwidth within the 600 MHz tuning range at 5-GHz mode are demonstrated with a low-flicker-noise corner of less than 60 KHz at the 5-GHz mode because of the use of SiGe HBT as the IQ Gilbert mixer cores at the second conversion stage.
0.18um CMOS Low-Noise Amplifier with two 2(nd)-order notch filters for Ultra-Wideband Wireless Receiver
(2007)
Huang, Che-Cheng
;
Huang, Zhe-Yang
;
Wang, Yen-Chun
;
Hung, Yeh-Tai
;
Chen, Meng-Ping
In this paper a CMOS dual-wideband low-noise amplifier (LNA) is designed for ultra-wideband (UWB) wireless receiver radio system. The design consists of a wideband input impedance matching network, two stage cascode amplifiers with shunt-peaked load, two 2(nd)-order notch fitters and an output buffer for measurement purpose. It is simulated in TSMC 0.18um standard CMOS process. The LNA gives 13.1dB maximum power gain between 3.0GHz-4.9GHz and 15.5dB maximum power gain between 6.2GHz-10.2GHz while consuming 21.9mW through a 1.8V supply. Over the 3.1GHz-4.9GHz frequency band and the 6.2GHz-10.2GHz,a minimum noise figure is 2.5dB and 2.8dB. Input return loss lower than 6.4dB in all bandwidth have been achieved.
0.25-0.35微米圖案轉移用石英蝕刻調細式相移光罩之最佳化模擬及其研製
(1995)
龍文安
;
Loong Wen-an
;
國立交通大學應用化學研究所
0.339fJ/bit/search Energy-Efficient TCAM Macro Design in 40nm LP CMOS
(2014)
Huang, Po-Tsang
;
Lai, Shu-Lin
;
Chuang, Ching-Te
;
Hwang, Wei
;
Huang, Jason
In this paper, a 256x40 energy-efficient ternary content addressable memory (TCAM) macro is designed and implemented in 40nm low power (LP) CMOS. Due to the thicker gate oxide in LP process, a 16T TCAM cell with p-type comparison circuits is proposed to increase the I-on/I-off difference of the dynamic circuitry. To further improve energy efficiency, don\'t-care-based ripple search-lines/bit-lines are used to reduce both the switching activities and wire capacitance. Moreover, column-based data-aware power control is employed for leakage power reduction and write-ability improvements. The experimental results show a leakage power reduction of 28.9%, a search-line power reduction of 31.74% and an energy efficiency metric of the TCAM macro of 0.339 fJ/bit/search.
0.35-mu m SiGe BiCMOS Weaver Image Rejection Receiver with 60-GHz Double-Quadrature Sub-harmonic Schottky Diode Mixer and 10-GHz Double Quadrature Gilbert Mixer
(2017-01-01)
Wang, Kuo-An
;
Meng, ChinChun
;
Lo, Tai-Lin
;
Huang, Guo-Wei
;
電機工程學系
A Weaver image rejection receiver using 60-GHz double-quadrature sub-harmonic Schottky diode mixer is demonstrated using 0.35-pm SiGe BiCMOS technology. A miniature RF quadrature generator is realized to generate 60-GHz quadrature RE signals. A Weaver image rejection architecture is applied in this paper to filter out the image signals. A triple-balanced sub-harmonic Schottky diode mixer with a trifilar transformer is adopted to the first down conversion stage to obtain good LO1-RF and 2LO(1)-RE isolations while the down-converted IF1 signals are converted to the base band I/Q signals with a double-quadrature Gilbert mixer at the second down conversion stage. As a result, a 60-GHz Weaver image rejection receiver with a 2-GHz channel bandwidth is achieved with IP1dB of 2 dBm and HP3 of 14 dBm.
0.35-MU-M PATTERN FABRICATION USING QUARTZ-ETCH ATTENUATE PHASE-SHIFTING MASK IN AN I-LINE STEPPER WITH A 0.50-NA AND A 0.60-SIGMA
(1995-02-01)
LOONG, WA
;
SHY, SL
;
LIN, YC
;
交大名義發表
;
應用化學系
A new method, namely, top critical dimension exposure-defocus tree (TCD E-D Tree), has been developed in this paper and used to analyze simulation results for quartz-etch attenuated phase-shifting mask (APSM). Simulation studies using Depict-3 (from TMA) on isolated and dense patterns indicate that numerical aperture (NA) 0.5 has greater depth of focus (DOF); NA 0.6 has larger exposure latitude (EL); best degree of coherence (sigma, sigma) value is between 0.6 approximately 0.7; best intensity transmittance (IT) range is 4 approximately 6%; the effect of mask bias on DOF and EL is rather small. The effect of sigma on space patterns including contact holes shows an inverse trend compared with lines. While conventional binary intensity mask (BIM) shows a 0.9 mum total DOF for dense line; APSM in our study (zero mask bias, 4% IT, 0.5 NA, 0.6 sigma) shows a 1.2 mum total DOF (30% improvement). The experimental results are highly in agreement with simulation. However, APSM shows only an insignificant improvement for EL in this study. Stepper with a NA of 0.5 and a sigma of 0.6 is very suitable for line, space and dense line/space pattern transfer using APSM in this study.
0.4V Reconfigurable Near-Threshold TCAM in 28nm High-k Metal-Gate CMOS Process
(2018-01-01)
Chan, Yun-Sheng
;
Huang, Po-Tsang
;
Wu, Shang-Lin
;
Lung, Sheng-Chi
;
Wang, Wei-Chang
This paper presents a near-threshold configurable ternary content addressable memory (TCAM) design for energy-constrained neural network or software-defined network (SDN) applications. A TCAM architecture based on foundry-based 6T SRAM mini-array improves area efficiency and minimizes disturbs to enable operation down to 0.4V, and provides configurable lookup tables for users. To minimize dynamic power consumption, hierarchical precharge structure (HPRE) and don't-care based ripple search-line scheme are utilized for decreasing both the switching activities and wire capacitance. Moreover, power-gating technique, self-timed control and V-trip-tracking write-assist are used to reduce standby power, speed-up propagation delays of global signals and improve write-ability at low voltage, respectively. A reconfigurable TCAM is implemented using UMC 28nm high-k metal gate (HKMG) CMOS process. The design achieves operating frequency of 240MHz (20MHz) with energy consumption of 1.146 (0.621) fJ/bit/search at 0.9V (0.4V).
0.65V-Input-Voltage 0.6V-Output-Voltage 30ppm/degrees C Low-Dropout Regulator with Embedded Voltage Reference for Low-Power Biomedical Systems
(2014-01-01)
Chen, Wei-Chung
;
Su, Yi-Ping
;
Lee, Yu-Huei
;
Wey, Chin-Long
;
Chen, Ke-Horng
0.66 mu m InGaP/InGaAlP single quantum well microdisk lasers
(1998-06-01)
Pan, JS
;
Cheng, PH
;
Lee, TD
;
Lai, YC
;
Tai, KC
Visible emitting microdisk lasers with single InGaP/InGaAlP quantum well were demonstrated for the first time. Large spontaneous emission factors beta of 0.12 and 0.08 were observed for 5 and 10 mu m diameter disks, respectively.
0.7 anomaly due to the Rashba interaction in a nonuniform electric field
(2009-01-01)
Hsiao, J. H.
;
Liu, K. M.
;
Hsu, S. Y.
;
Hong, T. M.
;
電子物理學系
We demonstrate that three conductance features, 0.5 and 0.7G(0) plateaus and a dip at 0.5G(0), observed in quantum point contacts (QPCs) can be consistently explained by the Rashba interaction in the nonuniform electric field created by the side gates along the transport direction. A quantity gamma is defined which depends on the extent of this nonuniformity and the electron density. A short QPC tends to have a small gamma. Only when gamma is large will the Rashba interaction produce a potential well deep enough to localize the electron. This provides the bound state that forms the Kondo resonance with the tunneling electrons. We propose to compare the medium/long QPC to small/large quantum dots, which are governed by the Kondo physics and the Coulomb blockade, respectively. The relation between 0.7 anomaly and the side-gate voltage, length of QPC, and temperature can all be determined to agree qualitatively with the experiments.
0.85 微米面射型雷射可靠度與雜訊品質之研究
(1995)
戴國仇
;
國立交通大學光電工程研究所
0.98微米波長砷化銦鎵扭曲量子井脊狀波導雷射研製
(1994)
李建平
;
LEE CHIEN-PING
;
交通大學電子研究所
本期計畫將在以往的研究成果的良好基礎上,進行半導體雷射元件高溫,連續操作的研究與實現.在過去的兩期計畫中,我們和交通部電信研究所共同合作,已成功地研究製出低起始電流、高量子效率等的0.98.mu.m InGaAs/GaAs/AlGaAs strained-layer量子井半導體雷射元件.同時,我們也針對雷射結構中的厚度參數進行理論上和實驗上的研究.因此,我們對0.98.mu.mInGaAs/GaAs/AlGaAs strained-layer量子井半導體雷射, 已經有了相當的了解,同時也獲致了相當的研究成果發表於國際性或學術刊物上.由於過去國內各研究單位,在半導體雷射的研究和製作上,並沒有特別傑出,甚至可以和世界知名的實驗室並駕齊驅的成果,所以很少人考慮到要將其研製的半導體雷射元件做高溫的連續操作. 但是,近幾年來,國內的研究經費補助有所改善下,成長晶體薄膜(Thin film)的磊晶機器,如MOCVD, MBE,已有多所研究單位獲得,並用於光電元件(諸如半導體雷射等)的研製上,例如交大MBE實驗室便已獲致多項良好的成果.而在0.98.mu.m半導體量子井雷射的研究上,由於它對未來的光纖通訊應用上,占有舉足輕重的地位,因此國內有些研究單位也開始注意和投入,因為此方面的研究不僅深具應用價值,同時也深具學術價值.也因此,我們在本期計畫中,將本著以往良好的基礎,做進一步的研製,以期能夠實際應用在光纖通訊上.而此一計畫的重要性在於藉著此一計畫的執行,建立真正屬於國內的自我技術.事實上,這些經驗和技術的建立,也可以應用到其它波長範圍的半導體雷射元件中,對於國內欲建立和發展的光電工業將有相當的幫助和影響. 因為一個商業化的半導體雷射元件,其成本有一大半(1/3~1/2)是耗費在包裝和生命期的測試等後續動作上面.所以,本期計畫即在藉此建立光電工業的基礎技術,期望能對國內正在起步的光電工業有所貢獻.
1 fF ESD protection device for gigahertz high-frequency output ESD protection
(2011-09-01)
Lee, J-H.
;
Huang, S-C.
;
Wu, Y. -H.
;
Chen, K. -H.
;
電控工程研究所
A mutual-protection scheme is proposed to achieve an ultra-low capacitance electrostatic discharge (ESD) protection device. The ESD protection device can not only dissipate ESD current, but also can make the vulnerable output transistor have the ESD protection capability. Namely, the output transistor can also protect ICs and help the ESD protection device to share the ESD current. Using this scheme can discharge more ESD current than the summation current of the two individual devices. From the ESD test result, it can achieve the required ESD level by using the ultra-low capacitance ESD protection device (similar to 1.2 fF).
(1) 以特徵值及格林函數展開擴散傳輸矩陣 (2) 2,2-dimethyl-3-ethyl-pentanol 自結合的 IR 研究
(2003)
陳振興
;
CHEN JENN-SHING
;
國立交通大學應用化學系