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收集所有交通大學研究人員與學生個人或團體所發表之各項學術著作，涵蓋期刊論文、教師專書、學位論文等項。;;Collections of Publications of NCTU Researchers and Students Like Journal Papers and Thesis.

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Access type: Metadata onlyAuthor: search.filters.author.Shih, PS

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    Interfacial reactions of Pd/Si0.76Ge0.24 by pulsed KrF laser annealing
    (1998-09-07)
    Chen, DR
    ;
    Luo, JS
    ;
    Lin, WT
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    Chang, CY
    ;
    Shih, PS
    The interfacial reactions of Pd/Si0.76Ge0.24 were studied by pulsed KrF laser annealing as a function of energy density and pulse number. At an energy density of 0.1-0.4 J/cm(2), a continuous germanosilicide layer composed of a low-temperature phase, Pd-2(Si1-xGex), and a high-temperature phase, Pd(Si1-xGex), was formed. Incontrast to vacuum annealing, Ge segregation out of the germanosilicide layer and the strain relaxation of the residual Si0.76Ge0.24 film could be effectively suppressed by pulsed KrF laser annealing at 0.1 J/cm(2). Multiple pulse annealing at 0.1 J/cm(2) could further homogenize the Pd concentration of the germanosilicide layer and promote the growth of Pd(Si1-xGex). Concurrently, the smoothness of the germanosilicide layer was substantially improved in comparison with those grown by vacuum annealing at temperatures above 200 degrees C. The studies also revealed that for multiple pulse annealing at 0.1 J/cm(2) with a low repetition rate, 1 Hz, the evolution of phase formation and Pd diffusion could be proceeded by each individual laser pulse. (C) 1998 American Institute of Physics. [S0003-6951(98)04136-9].
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    Short-channel poly-Si thin-film transistors with ultrathin channel and self-aligned tungsten-clad source/drain
    (2004)
    Zan, HW
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    Chang, TC
    ;
    Shih, PS
    ;
    Peng, DZ
    ;
    Kuo, PY
    A short-channel polycrystalline silicon (poly-Si) thin-film transistor (W/L=10 mum/3 mum) with an ultrathin channel (30 nm) and self-aligned tungsten-clad source/drain structure is demonstrated. With WF6 and SiH4 gas flow ratio of 40/12, selectively deposited tungsten film over 100 nm thick can be easily grown on source/drain regions. As a result, the parasitic source/drain resistance is greatly reduced, leading to improvement of device driving ability. Because tungsten deposition can be carried out at a low processing temperature of 300degreesC, the proposed simple structure is compatible with conventional top-gate structure and can be readily applied to low-temperature poly-Si fabrication. (C) 2003 The Electrochemical Society.