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收集所有交通大學研究人員與學生個人或團體所發表之各項學術著作,涵蓋期刊論文、教師專書、學位論文等項。;;Collections of Publications of NCTU Researchers and Students Like Journal Papers and Thesis.

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Now showing 1 - 10 of 15
  • Item type:Item,
    Criteria for the evaluation of linear two-port stability using two geometrically derived parameters
    (2009-02-01)
    Meng, Chinchun
    ;
    Wei, Hung-Ju
    ;
    Sun, Po-Hsing
    ;
    電信工程研究所
    ;
    Institute of Communications Engineering
    Two geometrically derived stability parameters, mu' (or mu) and nu' (or nu), are used to analyze the stability of a two-port network. The magnitudes of both mu' (or nu) and nu' (or nu) parameters determine geometrical relations between the stability circle and the unit Smith chart in the Gamma(S) (or Gamma(L)) plane, vertical bar mu'vertical bar (or vertical bar mu vertical bar) is defined as the minimum distance from the stability circle to the origin of the unit Smith chart in the Gamma(S) (or Gamma(L)) plane, while vertical bar nu'vertical bar (or vertical bar nu vertical bar) is defined as the maximum distance. Moreover, the signs of nu' (or nu) and mu' (or mu) parameters determine which region of the stability circle is stable (inside or outside) and whether the stable region includes the origin of the Smith chart, respectively. There are totally 12 situations between the stability circle and the unit Smith chart in the Gamma(S) (or Gamma(L)) plane by using mu' (or mu) and nu' (or nu) parameters. This paper classifies 12 situations in the Gamma(S) plane and also presents the corresponding practical two-port networks.
  • Item type:Item,
    17-GHz pHEMT Gilbert Single-Quadrature Downconverter With Polyphase Filters for Image Rejection
    (2010-01-01)
    Wei, Hung-Ju
    ;
    Meng, Chinchun
    ;
    Su, Jen-Yi
    ;
    Yu, Sheng-Wen
    ;
    Huang, Guo-Wei
    A 17-GHz Gilbert single-quadrature down-converter (SQDC) with polyphase filters is successfully demonstrated using 0.15-mu m pseudomorphic high electron mobility transistor (pHEMT) technology for the first time to the best of our knowledge. Thanks to the semi-insulating GaAs substrate and an advanced technology, the image rejection Gilbert mixer works well at high frequencies. A polyphase filter at the LO stage is employed to generate precisely differential quadrature signals and a four-stage polyphase filter at the IF stage can filter out the unwanted image signal to achieve image rejection. From 10-MHz to 90-MHz IF frequencies, a 30-dB image rejection ratio is achieved when RF and LO frequencies are designed around 17 GHz. The Gilbert SQDC has a 5.5-dB conversion gain, 0-dBm IP1db, and 16-dBm IIP3.
  • Item type:Item,
    Flicker Noise and Power Performance of CMOS Gilbert Mixers Using Static and Dynamic Current-Injection Techniques
    (2010-01-01)
    Wei, Hung-Ju
    ;
    Meng, Chinchun
    ;
    Chien, Hsin-I
    ;
    Lu, Hsi-Liang
    ;
    Syu, Jin-Siang
    The Gilbert Mixers using static and dynamic current-injection techniques are all implemented in 0.13 mu m CMOS technology. As the experimental results, the dynamic injection technique has higher conversion gain, less sensitivity to current injection, smaller required LO power, better noise figure and lower flicker noise when the transistor size and biasing condition are the same as that of static injection technique for a fair comparison.
  • Item type:Item,
    A Chebyshev-Response Step-Impedance Phase-Inverter Rat-Race Coupler Directly on Lossy Silicon Substrate and Its Gilbert Mixer Application
    (2011-04)
    Wei, Hung-Ju
    ;
    Meng, Chinchun
    ;
    Yu, Sheng-Wen
    ;
    Chang, Chia-Hung
    ;
    電機工程學系
    This paper focuses on the analysis and the design methodology of the step-impedance phase-inverter rat-race coupler on a silicon-based process. The issues of impedance limitation and bandwidth are discussed in detail. Our proposed concept utilizes a high silicon dielectric constant, phase-inverter structure, step-impedance technique, and Chebyshev response to make the rat-race coupler more compact (similar to 64 reduction) and highly balanced over a wide operating bandwidth. Moreover, the inter-digital coplanar stripline used in the step-impedance section effectively reduces the characteristic impedance of the transmission line for large size shrinkage and insertion-loss reduction. The demonstrated step-impedance rat-race coupler directly on silicon substrate has 6- similar to 7-dB insertion loss from 5 to 15 GHz and small variations in amplitude/phase balance. Compared with our previous work, the proposed rat-race coupler achieves a 3-dB improvement in the insertion loss. Thus, a 0.13-mu m CMOS Gilbert down-converter with a miniature phase-inverter rat-race coupler at the RF path for wideband single-to-differential signal conversion achieves a noise figure of 16 dB.
  • Item type:Item,
    A Chebyshev-Response Step-Impedance Phase-Inverter Rat-Race Coupler Directly on Lossy Silicon Substrate and Its Gilbert Mixer Application
    (2011-04)
    Wei, Hung-Ju
    ;
    Meng, Chinchun
    ;
    Yu, Sheng-Wen
    ;
    Chang, Chia-Hung
    ;
    電機工程學系
    This paper focuses on the analysis and the design methodology of the step-impedance phase-inverter rat-race coupler on a silicon-based process. The issues of impedance limitation and bandwidth are discussed in detail. Our proposed concept utilizes a high silicon dielectric constant, phase-inverter structure, step-impedance technique, and Chebyshev response to make the rat-race coupler more compact (similar to 64 reduction) and highly balanced over a wide operating bandwidth. Moreover, the inter-digital coplanar stripline used in the step-impedance section effectively reduces the characteristic impedance of the transmission line for large size shrinkage and insertion-loss reduction. The demonstrated step-impedance rat-race coupler directly on silicon substrate has 6- similar to 7-dB insertion loss from 5 to 15 GHz and small variations in amplitude/phase balance. Compared with our previous work, the proposed rat-race coupler achieves a 3-dB improvement in the insertion loss. Thus, a 0.13-mu m CMOS Gilbert down-converter with a miniature phase-inverter rat-race coupler at the RF path for wideband single-to-differential signal conversion achieves a noise figure of 16 dB.
  • Item type:Item,
    60-GHz SiGe BiCMOS Dual-Conversion Down-Converter: Schottky Diode RF Mixer and Analog Gilbert IF Mixer with Microwave Quadrature Generator
    (2016)
    Kao, Jen-Chieh
    ;
    Meng, Chinchun
    ;
    Wei, Hung-Ju
    ;
    Huang, Guo-Wei
    ;
    電機工程學系
    A 60 GHz dual-conversion down-converter using 0.35 mu m SiGe BiCMOS process is demonstrated in this paper. A Schottky diode ring mixer with wideband Marchand balun works as the 60-GHz RF mixer while two analog Gilbert micromixers with LO port pumped by two quadrature couplers work as IF mixers. The cut-off frequency of a Schottky diode makes a fundamental RF ring mixer possible because the series resistance of a Schottky diode is effectively reduced by the n+ buried layer in SiGe BiCMOS process. A Gilbert micromixer with an IF buffer is used to accommodate the single-ended output of the RF ring mixer. By combining these advantages, a dual-conversion down-converter is achieved. The converter has about 8 dB conversion gain, 10 GHz RF bandwidth of 50 - 60 GHz, 100 MHz IF bandwidth when LO1 power is 8 dBm and LO2 power is 2 dBm.
  • Item type:Item,
    60-GHz Dual-Conversion Down-Converter Using Schottky Diode and Dual-Band Rat-Race Coupler in Standard 0.18-mu m CMOS Process
    (2013)
    Hsiao, Yu-Chih
    ;
    Meng, Chinchun
    ;
    Wei, Hung-Ju
    ;
    Wang, Ta-Wei
    ;
    Huang, Guo-Wei
    A 60 GHz dual-conversion down-converter with a microwave mixer in the first conversion and analog mixers in the second conversion is demonstrated in 0.18-mu m CMOS technology. The first down-converted sub-harmonic mixer consists of a rat-race coupler with the dual-band Chebyshev response and Schottky diodes in anti-parallel configuration. The high cut-off frequency of a Schottky diode helps lowering the conversion loss and noise figure of a microwave mixer. A double balanced resistive mixer is used at the second down-converted mixer. As a result, the conversion gain is about 6 dB in the frequency range of 45 similar to 67 GHz and the IF bandwidth is over 1 GHz. IP1dB is about -5-dBm and IIP3 is about 5-dBm at 45 similar to 67 GHz. The single sideband noise figure is 21 dB at 60 GHz. The total power consumption is 71 mW at 2.5 V.
  • Item type:Item,
    Criteria for the evaluation of linear two-port stability using two geometrically derived parameters
    (2009-02-01)
    Meng, Chinchun
    ;
    Wei, Hung-Ju
    ;
    Sun, Po-Hsing
    ;
    電信工程研究所
    ;
    Institute of Communications Engineering
    Two geometrically derived stability parameters, mu' (or mu) and nu' (or nu), are used to analyze the stability of a two-port network. The magnitudes of both mu' (or nu) and nu' (or nu) parameters determine geometrical relations between the stability circle and the unit Smith chart in the Gamma(S) (or Gamma(L)) plane, vertical bar mu'vertical bar (or vertical bar mu vertical bar) is defined as the minimum distance from the stability circle to the origin of the unit Smith chart in the Gamma(S) (or Gamma(L)) plane, while vertical bar nu'vertical bar (or vertical bar nu vertical bar) is defined as the maximum distance. Moreover, the signs of nu' (or nu) and mu' (or mu) parameters determine which region of the stability circle is stable (inside or outside) and whether the stable region includes the origin of the Smith chart, respectively. There are totally 12 situations between the stability circle and the unit Smith chart in the Gamma(S) (or Gamma(L)) plane by using mu' (or mu) and nu' (or nu) parameters. This paper classifies 12 situations in the Gamma(S) plane and also presents the corresponding practical two-port networks.
  • Item type:Item,
    True 50% Duty-Cycle High-Speed Divider with the Modulus of Odd Numbers
    (2009)
    Tseng, Sheng-Che
    ;
    Wei, Hung-Ju
    ;
    Syu, Jin-Siang
    ;
    Meng, Chinchun
    ;
    Tsung, Kuan-Chang
    This paper proposes a true 50% duty-cycle highspeed prescaler with an odd modulus, based on current switchable D flip-flops. Each D flip-flop can sample data at the positive and negative clock edges, because of the changeable trigger mode. The proposed divide-by-N prescaler, with a 50% duty cycle, is formed as a ring with an N number of D flip-flops. Two types of 50% duty-cycle divide-by-five prescalers, the sample-hold-sample-hold-hold (SHSHH) prescaler and the sample-sample-hold-sample-hold (SSHSH) prescaler, are implemented using the 0.35 mu m SiGe HBT technology. The SHSHH divider has a better performance, up to 7 GHz, thanks to the synchronization of data and control signals.
  • Item type:Item,
    12 similar to 18 GHz Resistive Mixer with a Miniature Marchand Balun using Standard CMOS Process
    (2009)
    Wei, Hung-Ju
    ;
    Meng, Chinchun
    ;
    Tsung, Kuan-Chang
    ;
    Huang, Guo-Wei
    ;
    電信工程研究所
    A 12 similar to 18 GHz fundamental resistive mixer is demonstrated using standard 0.13 mu m CMOS technology. A Marchand Balun directly on lossy silicon substrate is integrated with the resistive mixer to generate equal-amplitude and out-of-phase signal for LO pumping. The size of the Ku-band Marchand balun only occupies 478 mu m x 250 mu m due to higher silicon dielectric constant. The measured conversion loss of the resistive mixer is around 22 dB under f(IF)=3 GHz and P(LO)=6 dBm. The small required LO power reveals that the Marchand balun does not suffer serious loss from silicon substrate. The miniature technique makes passive components more compact and easier to be integrated with IC circuit design.