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Improving Photoelectric Energy Conversion by structuring Si Surfaces with Ge Quantum Dots
(2019-01-01)
Shmid, Volodymyr
;
Kuryliuk, Vasyl
;
Nadtochiy, Andriy
;
Korotchenkov, Oleg
;
Li, Pei-Wen
Structuring Si surfaces with Ge quantum dots can have a beneficial effect on the photovoltage (PV), increasing the PV magnitude and decay time. The origin of this behavior is intimately related to mechanical strains developed in the vicinity of the Ge/Si interface. The structuring is a promising means of avoiding the uncontrolled production of recombination centers and offering significant enhancement of the recombination lifetime due to carrier trapping in the dots. This work can open new opportunities for advanced photoelectric devices with recombination center free nanostructures.
Direct oxidation of Si1-xGex layers using Vacuum-Ultra-Violet light radiation in oxygen
(1998-02-01)
Chen, LP
;
Chan, YC
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Chang, SJ
;
Huang, GW
;
Chang, CY
Oxidation of Si1-xGex films has been carried out by direct photo chemical Vapor deposition (direct photo-CVD) directly with activated O-2 induced by Vacuum-Ultra-Violet (VUV) light radiation, The Auger electron spectroscopy profiles show that no Ge-pileup layer at the oxide/Si1-xGex interface is observed after VUV-induced Si1-xGex oxidation process. The X-ray photoelectron spectroscopy analysis of the samples reveals that Si and Ge are oxidized simultaneously in oxidation process and a mixed oxide layer consisting both SiO2 and GeO2 is formed, This might be the reason that Cc pileup effect is eliminated in this study.
Single-fabrication-step Ge nanosphere/SiO2/SiGe heterostructures: a key enabler for realizing Ge MOS devices
(2018-05-18)
Liao, P. H.
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Peng, K. P.
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Lin, H. C.
;
George, T.
;
Li, P. W.
We report channel and strain engineering of self-organized, gate-stacking heterostructures comprising Ge-nanosphere gate/SiO2/SiGe-channels. An exquisitely-controlled dynamic balance between the concentrations of oxygen, Si, and Ge interstitials was effectively exploited to simultaneously create these heterostructures in a single oxidation step. Process-controlled tunability of the channel length (5-95 nm diameters for the Ge-nanospheres), gate oxide thickness (2.5-4.8 nm), as well as crystal orientation, chemical composition and strain engineering of the SiGe-channel was achieved. Single-crystalline (100) Si1-xGex shells with Ge content as high as x = 0.85 and with a compressive strain of 3%, as well as (110) Si1-xGex shells with Ge content of x = 0.35 and corresponding compressive strain of 1.5% were achieved. For each crystal orientation, our high Ge-content, highly-stressed SiGe shells feature a high degree of crystallinity and thus, provide a core 'building block' required for the fabrication of Ge-based MOS devices.
260-GHz differential amplifier in SiGe heterojunction bipolar transistor technology
(2017-02-02)
Yoon, D.
;
Seo, M. -G.
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Song, K.
;
Kaynak, M.
;
Tillack, B.
A 260-GHz amplifier in a SiGe heterojunction bipolar transistor (HBT) technology is reported. It is based on three-stage differential cascode topology and adopts a passive shunt transistor pair at the output of each amplifying stage to relax instability caused by parasitic base inductance of amplifying transistor pair. The instability of the amplifier can be mitigated by tuning the base bias voltage of the shunt transistor pair. Peak gain of the amplifier was measured as 15 dB at 260 GHz. DC power dissipation is 112 mW. The chip occupies 300 x 160 m(2) excluding Baluns and probing pads.
矽鍺源/汲極金氧半電晶體及電感在射頻應用之研究(I)
(2000)
張俊彥
;
CHANG CHUN-YEN
;
交通大學電子工程系
矽與矽鍺材料及元件之發展---總計畫
(1997)
張俊彥
;
CHANG CHUN-YEN
;
交通大學電子工程研究所
本整合計畫將以三年的時間，研究探討Si及SiGe磊晶層之成長機制，摻雜特性。SiGe之材料及物理特性，包括成長Si/ SiGe量子井(QuantumnWell)及超晶格(Super-lattice)等結構材料，並藉由SIMS、X-Ray Diffraction、 RBS、TEM 、SEM、 AFM及FTIR等儀器分析材料及物理特性.以此為基礎，我們將研製短通道 Si及SiGeMOSFET元件和異質接面雙極性電晶體HBT。最後，我仍將分析SiGe MOSFET和SiGeHBT的直流高頻特性，並與SiMOSFET和BJT作比較，以驗證矽鍺材料的物理特性及其在半導體元件物理應用的潛力。經由此計畫的進行，我們將能夠對於Si/SiGe磊晶層，從成長、材料特性、物理特性、量測技術、元件製作、到電路的應用，有一完整的研究。對於未來 Si/SiGe材料的發展有很重大的意義。
Effect of Low Temperature Ge Seed Layer and Post Thermal Annealing on Quality of Ge1-xSix (0.05 <= x <= 0.1) Graded Buffer Layers by UHV-CVD
(2014-07-01)
Chi-Lang Nguyen
;
Nguyen Hong Quan
;
Binh-Tinh Tran
;
Su, Yung-Hsuan
;
Tang, Shih-Hsuan
High crystal quality, smooth surface and fully relaxed Ge1-xSix (0.05 <= x <= 0.1) buffers are grown on 6 degrees-off (100) Si substrate by UHV-CVD. A low-temperature (LT) Ge seed layer is used to improve the quality of the Ge1-xSix buffers. In this study, the LT-Ge seed layer is deposited directly onto the Si substrate at a low temperature of 315 degrees C. After that, stress-free Si0.1Ge0.9 and Si0.05Ge0.95 layers are grown, respectively. An in-situ annealing process is also performed for the Si0.1Ge0.9/LT-Ge layers to increase the degree of relaxation. The total thickness of the epitaxial layer is 270 nm, with the average surface roughness at 0.6 nm.
An analysis of base current effect on the anomalous dip of scattering parameter S(12) in SiGeHBTs
(2005)
Chen, Han-Yu
;
Chen, Kun-Ming
;
Huang, Guo-Wei
;
Chang, Chun-Yen
;
電子工程學系及電子研究所
In this paper, the anomalous dip in scattering parameters S(12) of SiGe HBTs is explained quantitatively for the first time. It was found that under constant collector-emitter voltage (V(CE)), an increase of base current (which corresponds to an increase of base-emitter capacitance (C pi) enhances the anomalous dip.
ANNEALING TEMPERATURE EFFECT ON THE SENSITIVITY OF SIGE NANOWIRE FOR BIO-SENSOR
(2011)
Chang, Kow-Ming
;
Chen, Chu-Feng
;
Wang, Yu-Bin
;
Liu, Chung-Hsien
;
Kuo, Jiun-Ming
Nanowire is widely used in biological sensor because it has the high surface-to-volume ratio. Germanium (Ge) would be beneficial to enhance the sensitivity of silicon nanowire for bio-sensor. In this study, we have successfully fabricated the SiGe on Insulator (SGOI) nanowires with different annealing temperature by side-wall spacer technique, respectively. The 3-amino-propyltrime-thoxy-silane (APTS) is used to modify the surface, which can connect the bio-linker. Nanowire is considered as a resistance, and the change of conductance (Delta G) and sensitivity (S) of different samples corresponding to APTS treatment were investigated. As annealing temperature was elevated from 800 to 950 degrees C, the SiGe nanowire exhibited increasing sensitivity in the chemical detection. However, it was noted that degradation of sensitivity was observed as the annealing temperature increases up to 1000 degrees C. This behavior may be associated with the reduction of the Ge concentration at the surface of SiGe nanowire due to high-temperature diffusion of Ge in Si. So, temperature is a key parameter in the annealing process producing two effects: repairs of defects and Ge diffusion. There would be an optimal annealing temperature between 900 and 1000 degrees C.
A 5.7 GHz Gilbert upconversion mixer with an LC current combiner output using 0.35 mu m SiGe HBT technology
(2005-06-01)
Wu, TH
;
Meng, CC
;
Wu, TH
;
Huang, GW
;
電信工程研究所
This paper demonstrates a small compact 5.7 GHz upconversion Gilbert micromixer using 0.35 mu m SiGe HBT technology. A micromixer has a broadband matched single-ended input port. A passive LC current combiner is used to convert micromixer differential output into a single-ended output and doubles the output current for single-ended-input and single-ended-output applications. Thus, a truly balanced operation of a Gilbert upconversion mixer with a single-ended input and a single-ended output is achieved in this paper. The fully matched upconversion micromixer has conversion gain of -4 dB, OP(1 dB) of -9 dBm and OIP(3) of 4 dBm when input IF=0.3 GHz. LO=5.4 GHz and output RF=5.7 GHz. The IF input return loss is better than IS dB for frequencies up to 20 GHz while RF output return loss is 25 dB at 5.7 GHz. The supply voltage is 3.3 V and the current consumption is 4.6 mA. The die size is 0.9 X 0.9 mm(2) with 3 integrated on-chip inductors.

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