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收集所有交通大學研究人員與學生個人或團體所發表之各項學術著作，涵蓋期刊論文、教師專書、學位論文等項。;;Collections of Publications of NCTU Researchers and Students Like Journal Papers and Thesis.

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    True 50% Duty-Cycle High-Speed Divider with the Modulus of Odd Numbers
    (2009)
    Tseng, Sheng-Che
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    Wei, Hung-Ju
    ;
    Syu, Jin-Siang
    ;
    Meng, Chinchun
    ;
    Tsung, Kuan-Chang
    This paper proposes a true 50% duty-cycle highspeed prescaler with an odd modulus, based on current switchable D flip-flops. Each D flip-flop can sample data at the positive and negative clock edges, because of the changeable trigger mode. The proposed divide-by-N prescaler, with a 50% duty cycle, is formed as a ring with an N number of D flip-flops. Two types of 50% duty-cycle divide-by-five prescalers, the sample-hold-sample-hold-hold (SHSHH) prescaler and the sample-sample-hold-sample-hold (SSHSH) prescaler, are implemented using the 0.35 mu m SiGe HBT technology. The SHSHH divider has a better performance, up to 7 GHz, thanks to the synchronization of data and control signals.
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    A High-Speed HBT Prescaler Based on the Divide-by-Two Topology
    (2007)
    Wei, Hung-Ju
    ;
    Meng, Chinchun
    ;
    Chang, Yuwen
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    Lin, Yi-Chen
    ;
    Huang, Guo-Wei
    This paper demonstrates the Divide-by4/5 prescalers with merged AND gates in 2 mu m GaInP/GaAs heterojunction bipolar transistor (HBT) and 035 mu m SiGe HBT technologies. By biasing the HBT near the peak transit-time frequency (f(tau)), the maximum operating frequency of a D-type flip-flop (D-FF) can be promoted. At the supply voltage of 5 V, the GaInP/GaAs prescaler operates from 30 MHz to 5.2 GHz, and the SiGe prescaler has the higher-speed performance of 1 GHz similar to 8 GHz at the cost of power consumption.